nathan/Chromebook-Device-Nyan-NVIDIA-Tegra-K1-T124-Upstream-Linux-3.10-LTS-Kernel
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Updated from Linux LTS 3.10.24 to 3.10.25

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This commit is contained in:
Nathan
2025-04-09 19:32:12 -05:00
parent cc92f436cd
commit 92cb237c3b
85 changed files with 642 additions and 313 deletions
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7
arch/arm/kernel/process.c
View File

@@ -410,6 +410,7 @@ EXPORT_SYMBOL(dump_fpu);
unsigned long get_wchan(struct task_struct *p)
{
struct stackframe frame;
unsigned long stack_page;
int count = 0;
if (!p || p == current || p->state == TASK_RUNNING)
return 0;
@@ -418,9 +419,11 @@ unsigned long get_wchan(struct task_struct *p)
frame.sp = thread_saved_sp(p);
frame.lr = 0; /* recovered from the stack */
frame.pc = thread_saved_pc(p);
stack_page = (unsigned long)task_stack_page(p);
do {
int ret = unwind_frame(&frame);
if (ret < 0)
if (frame.sp < stack_page ||
frame.sp >= stack_page + THREAD_SIZE ||
unwind_frame(&frame) < 0)
return 0;
if (!in_sched_functions(frame.pc))
return frame.pc;

2
arch/arm/kernel/stacktrace.c
View File

@@ -31,7 +31,7 @@ int notrace unwind_frame(struct stackframe *frame)
high = ALIGN(low, THREAD_SIZE);
/* check current frame pointer is within bounds */
if (fp < (low + 12) || fp + 4 >= high)
if (fp < low + 12 || fp > high - 4)
return -EINVAL;
/* restore the registers from the stack frame */

43
arch/arm/mach-omap2/omap_hwmod.c
View File

@@ -399,7 +399,7 @@ static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
}
/**
* _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
* _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
* @oh: struct omap_hwmod *
* @v: pointer to register contents to modify
*
@@ -426,6 +426,36 @@ static int _set_softreset(struct omap_hwmod *oh, u32 *v)
return 0;
}
/**
* _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
* @oh: struct omap_hwmod *
* @v: pointer to register contents to modify
*
* Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
* error or 0 upon success.
*/
static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
{
u32 softrst_mask;
if (!oh->class->sysc ||
!(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
return -EINVAL;
if (!oh->class->sysc->sysc_fields) {
WARN(1,
"omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
oh->name);
return -EINVAL;
}
softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
*v &= ~softrst_mask;
return 0;
}
/**
* _wait_softreset_complete - wait for an OCP softreset to complete
* @oh: struct omap_hwmod * to wait on
@@ -1909,6 +1939,12 @@ static int _ocp_softreset(struct omap_hwmod *oh)
ret = _set_softreset(oh, &v);
if (ret)
goto dis_opt_clks;
_write_sysconfig(v, oh);
ret = _clear_softreset(oh, &v);
if (ret)
goto dis_opt_clks;
_write_sysconfig(v, oh);
if (oh->class->sysc->srst_udelay)
@@ -3148,6 +3184,11 @@ int omap_hwmod_softreset(struct omap_hwmod *oh)
goto error;
_write_sysconfig(v, oh);
ret = _clear_softreset(oh, &v);
if (ret)
goto error;
_write_sysconfig(v, oh);
error:
return ret;
}

13
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
View File

@@ -1930,7 +1930,8 @@ static struct omap_hwmod_class_sysconfig omap3xxx_usb_host_hs_sysc = {
.syss_offs = 0x0014,
.sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP |
SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
.sysc_fields = &omap_hwmod_sysc_type1,
@@ -2008,15 +2009,7 @@ static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
* hence HWMOD_SWSUP_MSTANDBY
*/
/*
* During system boot; If the hwmod framework resets the module
* the module will have smart idle settings; which can lead to deadlock
* (above Errata Id:i660); so, dont reset the module during boot;
* Use HWMOD_INIT_NO_RESET.
*/
.flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
HWMOD_INIT_NO_RESET,
.flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
};
/*

8
arch/arm/mach-pxa/reset.c
View File

@@ -13,6 +13,7 @@
#include <mach/regs-ost.h>
#include <mach/reset.h>
#include <mach/smemc.h>
unsigned int reset_status;
EXPORT_SYMBOL(reset_status);
@@ -81,6 +82,12 @@ static void do_hw_reset(void)
writel_relaxed(OSSR_M3, OSSR);
/* ... in 100 ms */
writel_relaxed(readl_relaxed(OSCR) + 368640, OSMR3);
/*
* SDRAM hangs on watchdog reset on Marvell PXA270 (erratum 71)
* we put SDRAM into self-refresh to prevent that
*/
while (1)
writel_relaxed(MDREFR_SLFRSH, MDREFR);
}
void pxa_restart(char mode, const char *cmd)
@@ -104,4 +111,3 @@ void pxa_restart(char mode, const char *cmd)
break;
}
}

102
arch/arm/mach-pxa/tosa.c
View File

@@ -424,57 +424,57 @@ static struct platform_device tosa_power_device = {
* Tosa Keyboard
*/
static const uint32_t tosakbd_keymap[] = {
KEY(0, 2, KEY_W),
KEY(0, 6, KEY_K),
KEY(0, 7, KEY_BACKSPACE),
KEY(0, 8, KEY_P),
KEY(1, 1, KEY_Q),
KEY(1, 2, KEY_E),
KEY(1, 3, KEY_T),
KEY(1, 4, KEY_Y),
KEY(1, 6, KEY_O),
KEY(1, 7, KEY_I),
KEY(1, 8, KEY_COMMA),
KEY(2, 1, KEY_A),
KEY(2, 2, KEY_D),
KEY(2, 3, KEY_G),
KEY(2, 4, KEY_U),
KEY(2, 6, KEY_L),
KEY(2, 7, KEY_ENTER),
KEY(2, 8, KEY_DOT),
KEY(3, 1, KEY_Z),
KEY(3, 2, KEY_C),
KEY(3, 3, KEY_V),
KEY(3, 4, KEY_J),
KEY(3, 5, TOSA_KEY_ADDRESSBOOK),
KEY(3, 6, TOSA_KEY_CANCEL),
KEY(3, 7, TOSA_KEY_CENTER),
KEY(3, 8, TOSA_KEY_OK),
KEY(3, 9, KEY_LEFTSHIFT),
KEY(4, 1, KEY_S),
KEY(4, 2, KEY_R),
KEY(4, 3, KEY_B),
KEY(4, 4, KEY_N),
KEY(4, 5, TOSA_KEY_CALENDAR),
KEY(4, 6, TOSA_KEY_HOMEPAGE),
KEY(4, 7, KEY_LEFTCTRL),
KEY(4, 8, TOSA_KEY_LIGHT),
KEY(4, 10, KEY_RIGHTSHIFT),
KEY(5, 1, KEY_TAB),
KEY(5, 2, KEY_SLASH),
KEY(5, 3, KEY_H),
KEY(5, 4, KEY_M),
KEY(5, 5, TOSA_KEY_MENU),
KEY(5, 7, KEY_UP),
KEY(5, 11, TOSA_KEY_FN),
KEY(6, 1, KEY_X),
KEY(6, 2, KEY_F),
KEY(6, 3, KEY_SPACE),
KEY(6, 4, KEY_APOSTROPHE),
KEY(6, 5, TOSA_KEY_MAIL),
KEY(6, 6, KEY_LEFT),
KEY(6, 7, KEY_DOWN),
KEY(6, 8, KEY_RIGHT),
KEY(0, 1, KEY_W),
KEY(0, 5, KEY_K),
KEY(0, 6, KEY_BACKSPACE),
KEY(0, 7, KEY_P),
KEY(1, 0, KEY_Q),
KEY(1, 1, KEY_E),
KEY(1, 2, KEY_T),
KEY(1, 3, KEY_Y),
KEY(1, 5, KEY_O),
KEY(1, 6, KEY_I),
KEY(1, 7, KEY_COMMA),
KEY(2, 0, KEY_A),
KEY(2, 1, KEY_D),
KEY(2, 2, KEY_G),
KEY(2, 3, KEY_U),
KEY(2, 5, KEY_L),
KEY(2, 6, KEY_ENTER),
KEY(2, 7, KEY_DOT),
KEY(3, 0, KEY_Z),
KEY(3, 1, KEY_C),
KEY(3, 2, KEY_V),
KEY(3, 3, KEY_J),
KEY(3, 4, TOSA_KEY_ADDRESSBOOK),
KEY(3, 5, TOSA_KEY_CANCEL),
KEY(3, 6, TOSA_KEY_CENTER),
KEY(3, 7, TOSA_KEY_OK),
KEY(3, 8, KEY_LEFTSHIFT),
KEY(4, 0, KEY_S),
KEY(4, 1, KEY_R),
KEY(4, 2, KEY_B),
KEY(4, 3, KEY_N),
KEY(4, 4, TOSA_KEY_CALENDAR),
KEY(4, 5, TOSA_KEY_HOMEPAGE),
KEY(4, 6, KEY_LEFTCTRL),
KEY(4, 7, TOSA_KEY_LIGHT),
KEY(4, 9, KEY_RIGHTSHIFT),
KEY(5, 0, KEY_TAB),
KEY(5, 1, KEY_SLASH),
KEY(5, 2, KEY_H),
KEY(5, 3, KEY_M),
KEY(5, 4, TOSA_KEY_MENU),
KEY(5, 6, KEY_UP),
KEY(5, 10, TOSA_KEY_FN),
KEY(6, 0, KEY_X),
KEY(6, 1, KEY_F),
KEY(6, 2, KEY_SPACE),
KEY(6, 3, KEY_APOSTROPHE),
KEY(6, 4, TOSA_KEY_MAIL),
KEY(6, 5, KEY_LEFT),
KEY(6, 6, KEY_DOWN),
KEY(6, 7, KEY_RIGHT),
};
static struct matrix_keymap_data tosakbd_keymap_data = {

16
arch/mips/mm/dma-default.c
View File

@@ -50,16 +50,20 @@ static inline struct page *dma_addr_to_page(struct device *dev,
}
/*
* The affected CPUs below in 'cpu_needs_post_dma_flush()' can
* speculatively fill random cachelines with stale data at any time,
* requiring an extra flush post-DMA.
*
* Warning on the terminology - Linux calls an uncached area coherent;
* MIPS terminology calls memory areas with hardware maintained coherency
* coherent.
*/
static inline int cpu_is_noncoherent_r10000(struct device *dev)
static inline int cpu_needs_post_dma_flush(struct device *dev)
{
return !plat_device_is_coherent(dev) &&
(current_cpu_type() == CPU_R10000 ||
current_cpu_type() == CPU_R12000);
current_cpu_type() == CPU_R12000 ||
current_cpu_type() == CPU_BMIPS5000);
}
static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp)
@@ -230,7 +234,7 @@ static inline void __dma_sync(struct page *page,
static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr,
size_t size, enum dma_data_direction direction, struct dma_attrs *attrs)
{
if (cpu_is_noncoherent_r10000(dev))
if (cpu_needs_post_dma_flush(dev))
__dma_sync(dma_addr_to_page(dev, dma_addr),
dma_addr & ~PAGE_MASK, size, direction);
@@ -281,7 +285,7 @@ static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
static void mips_dma_sync_single_for_cpu(struct device *dev,
dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
{
if (cpu_is_noncoherent_r10000(dev))
if (cpu_needs_post_dma_flush(dev))
__dma_sync(dma_addr_to_page(dev, dma_handle),
dma_handle & ~PAGE_MASK, size, direction);
}
@@ -302,7 +306,7 @@ static void mips_dma_sync_sg_for_cpu(struct device *dev,
/* Make sure that gcc doesn't leave the empty loop body. */
for (i = 0; i < nelems; i++, sg++) {
if (cpu_is_noncoherent_r10000(dev))
if (cpu_needs_post_dma_flush(dev))
__dma_sync(sg_page(sg), sg->offset, sg->length,
direction);
}

6
arch/powerpc/include/asm/pgalloc-32.h
View File

@@ -84,10 +84,8 @@ static inline void pgtable_free_tlb(struct mmu_gather *tlb,
static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
unsigned long address)
{
struct page *page = page_address(table);
tlb_flush_pgtable(tlb, address);
pgtable_page_dtor(page);
pgtable_free_tlb(tlb, page, 0);
pgtable_page_dtor(table);
pgtable_free_tlb(tlb, page_address(table), 0);
}
#endif /* _ASM_POWERPC_PGALLOC_32_H */

6
arch/powerpc/include/asm/pgalloc-64.h
View File

@@ -144,11 +144,9 @@ static inline void pgtable_free_tlb(struct mmu_gather *tlb,
static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
unsigned long address)
{
struct page *page = page_address(table);
tlb_flush_pgtable(tlb, address);
pgtable_page_dtor(page);
pgtable_free_tlb(tlb, page, 0);
pgtable_page_dtor(table);
pgtable_free_tlb(tlb, page_address(table), 0);
}
#else /* if CONFIG_PPC_64K_PAGES */

8
arch/x86/Makefile
View File

@@ -31,8 +31,8 @@ ifeq ($(CONFIG_X86_32),y)
KBUILD_CFLAGS += -msoft-float -mregparm=3 -freg-struct-return
# Don't autogenerate SSE instructions
KBUILD_CFLAGS += -mno-sse
# Don't autogenerate MMX or SSE instructions
KBUILD_CFLAGS += -mno-mmx -mno-sse
# Never want PIC in a 32-bit kernel, prevent breakage with GCC built
# with nonstandard options
@@ -60,8 +60,8 @@ else
KBUILD_AFLAGS += -m64
KBUILD_CFLAGS += -m64
# Don't autogenerate SSE instructions
KBUILD_CFLAGS += -mno-sse
# Don't autogenerate MMX or SSE instructions
KBUILD_CFLAGS += -mno-mmx -mno-sse
# Use -mpreferred-stack-boundary=3 if supported.
KBUILD_CFLAGS += $(call cc-option,-mpreferred-stack-boundary=3)

35
arch/x86/kvm/lapic.c
View File

@@ -153,6 +153,8 @@ static inline int kvm_apic_id(struct kvm_lapic *apic)
return (kvm_apic_get_reg(apic, APIC_ID) >> 24) & 0xff;
}
#define KVM_X2APIC_CID_BITS 0
static void recalculate_apic_map(struct kvm *kvm)
{
struct kvm_apic_map *new, *old = NULL;
@@ -190,7 +192,8 @@ static void recalculate_apic_map(struct kvm *kvm)
if (apic_x2apic_mode(apic)) {
new->ldr_bits = 32;
new->cid_shift = 16;
new->cid_mask = new->lid_mask = 0xffff;
new->cid_mask = (1 << KVM_X2APIC_CID_BITS) - 1;
new->lid_mask = 0xffff;
} else if (kvm_apic_sw_enabled(apic) &&
!new->cid_mask /* flat mode */ &&
kvm_apic_get_reg(apic, APIC_DFR) == APIC_DFR_CLUSTER) {
@@ -855,7 +858,8 @@ static u32 apic_get_tmcct(struct kvm_lapic *apic)
ASSERT(apic != NULL);
/* if initial count is 0, current count should also be 0 */
if (kvm_apic_get_reg(apic, APIC_TMICT) == 0)
if (kvm_apic_get_reg(apic, APIC_TMICT) == 0 ||
apic->lapic_timer.period == 0)
return 0;
remaining = hrtimer_get_remaining(&apic->lapic_timer.timer);
@@ -1705,7 +1709,6 @@ static void apic_sync_pv_eoi_from_guest(struct kvm_vcpu *vcpu,
void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu)
{
u32 data;
void *vapic;
if (test_bit(KVM_APIC_PV_EOI_PENDING, &vcpu->arch.apic_attention))
apic_sync_pv_eoi_from_guest(vcpu, vcpu->arch.apic);
@@ -1713,9 +1716,8 @@ void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu)
if (!test_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention))
return;
vapic = kmap_atomic(vcpu->arch.apic->vapic_page);
data = *(u32 *)(vapic + offset_in_page(vcpu->arch.apic->vapic_addr));
kunmap_atomic(vapic);
kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apic->vapic_cache, &data,
sizeof(u32));
apic_set_tpr(vcpu->arch.apic, data & 0xff);
}
@@ -1751,7 +1753,6 @@ void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu)
u32 data, tpr;
int max_irr, max_isr;
struct kvm_lapic *apic = vcpu->arch.apic;
void *vapic;
apic_sync_pv_eoi_to_guest(vcpu, apic);
@@ -1767,18 +1768,24 @@ void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu)
max_isr = 0;
data = (tpr & 0xff) | ((max_isr & 0xf0) << 8) | (max_irr << 24);
vapic = kmap_atomic(vcpu->arch.apic->vapic_page);
*(u32 *)(vapic + offset_in_page(vcpu->arch.apic->vapic_addr)) = data;
kunmap_atomic(vapic);
kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apic->vapic_cache, &data,
sizeof(u32));
}
void kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr)
int kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr)
{
vcpu->arch.apic->vapic_addr = vapic_addr;
if (vapic_addr)
if (vapic_addr) {
if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
&vcpu->arch.apic->vapic_cache,
vapic_addr, sizeof(u32)))
return -EINVAL;
__set_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention);
else
} else {
__clear_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention);
}
vcpu->arch.apic->vapic_addr = vapic_addr;
return 0;
}
int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data)

4
arch/x86/kvm/lapic.h
View File

@@ -34,7 +34,7 @@ struct kvm_lapic {
*/
void *regs;
gpa_t vapic_addr;
struct page *vapic_page;
struct gfn_to_hva_cache vapic_cache;
unsigned long pending_events;
unsigned int sipi_vector;
};
@@ -76,7 +76,7 @@ void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data);
void kvm_apic_write_nodecode(struct kvm_vcpu *vcpu, u32 offset);
void kvm_apic_set_eoi_accelerated(struct kvm_vcpu *vcpu, int vector);
void kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr);
int kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr);
void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu);
void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu);

40
arch/x86/kvm/x86.c
View File

@@ -3138,8 +3138,7 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
r = -EFAULT;
if (copy_from_user(&va, argp, sizeof va))
goto out;
r = 0;
kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
break;
}
case KVM_X86_SETUP_MCE: {
@@ -5539,36 +5538,6 @@ static void post_kvm_run_save(struct kvm_vcpu *vcpu)
!kvm_event_needs_reinjection(vcpu);
}
static int vapic_enter(struct kvm_vcpu *vcpu)
{
struct kvm_lapic *apic = vcpu->arch.apic;
struct page *page;
if (!apic || !apic->vapic_addr)
return 0;
page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
if (is_error_page(page))
return -EFAULT;
vcpu->arch.apic->vapic_page = page;
return 0;
}
static void vapic_exit(struct kvm_vcpu *vcpu)
{
struct kvm_lapic *apic = vcpu->arch.apic;
int idx;
if (!apic || !apic->vapic_addr)
return;
idx = srcu_read_lock(&vcpu->kvm->srcu);
kvm_release_page_dirty(apic->vapic_page);
mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
srcu_read_unlock(&vcpu->kvm->srcu, idx);
}
static void update_cr8_intercept(struct kvm_vcpu *vcpu)
{
int max_irr, tpr;
@@ -5889,11 +5858,6 @@ static int __vcpu_run(struct kvm_vcpu *vcpu)
struct kvm *kvm = vcpu->kvm;
vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
r = vapic_enter(vcpu);
if (r) {
srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
return r;
}
r = 1;
while (r > 0) {
@@ -5951,8 +5915,6 @@ static int __vcpu_run(struct kvm_vcpu *vcpu)
srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
vapic_exit(vcpu);
return r;
}

7
arch/x86/platform/efi/efi.c
View File

@@ -780,13 +780,6 @@ void __init efi_init(void)
set_bit(EFI_MEMMAP, &x86_efi_facility);
#ifdef CONFIG_X86_32
if (efi_is_native()) {
x86_platform.get_wallclock = efi_get_time;
x86_platform.set_wallclock = efi_set_rtc_mmss;
}
#endif
#if EFI_DEBUG
print_efi_memmap();
#endif