Initial commit; kernel source import

include/linux/clk/bcm2835.h

@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __LINUX_CLK_BCM2835_H_
+#define __LINUX_CLK_BCM2835_H_
+
+void __init bcm2835_init_clocks(void);
+
+#endif

include/linux/clk/mvebu.h

@@ -0,0 +1,22 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __CLK_MVEBU_H_
+#define __CLK_MVEBU_H_
+
+void __init mvebu_clocks_init(void);
+
+#endif

include/linux/clk/mxs.h

@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_CLK_MXS_H
+#define __LINUX_CLK_MXS_H
+
+int mx23_clocks_init(void);
+int mx28_clocks_init(void);
+int mxs_saif_clkmux_select(unsigned int clkmux);
+
+#endif

include/linux/clk/sunxi.h

@@ -0,0 +1,22 @@
+/*
+ * Copyright 2012 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __LINUX_CLK_SUNXI_H_
+#define __LINUX_CLK_SUNXI_H_
+
+void __init sunxi_init_clocks(void);
+
+#endif

include/linux/clk/tegra.h

@@ -0,0 +1,127 @@
+/*
+ * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __LINUX_CLK_TEGRA_H_
+#define __LINUX_CLK_TEGRA_H_
+
+#include <linux/clk.h>
+
+/*
+ * Tegra CPU clock and reset control ops
+ *
+ * wait_for_reset:
+ *	keep waiting until the CPU in reset state
+ * put_in_reset:
+ *	put the CPU in reset state
+ * out_of_reset:
+ *	release the CPU from reset state
+ * enable_clock:
+ *	CPU clock un-gate
+ * disable_clock:
+ *	CPU clock gate
+ * rail_off_ready:
+ *	CPU is ready for rail off
+ * suspend:
+ *	save the clock settings when CPU go into low-power state
+ * resume:
+ *	restore the clock settings when CPU exit low-power state
+ */
+struct tegra_cpu_car_ops {
+	void (*wait_for_reset)(u32 cpu);
+	void (*put_in_reset)(u32 cpu);
+	void (*out_of_reset)(u32 cpu);
+	void (*enable_clock)(u32 cpu);
+	void (*disable_clock)(u32 cpu);
+#ifdef CONFIG_PM_SLEEP
+	bool (*rail_off_ready)(void);
+	void (*suspend)(void);
+	void (*resume)(void);
+#endif
+};
+
+extern struct tegra_cpu_car_ops *tegra_cpu_car_ops;
+
+static inline void tegra_wait_cpu_in_reset(u32 cpu)
+{
+	if (WARN_ON(!tegra_cpu_car_ops->wait_for_reset))
+		return;
+
+	tegra_cpu_car_ops->wait_for_reset(cpu);
+}
+
+static inline void tegra_put_cpu_in_reset(u32 cpu)
+{
+	if (WARN_ON(!tegra_cpu_car_ops->put_in_reset))
+		return;
+
+	tegra_cpu_car_ops->put_in_reset(cpu);
+}
+
+static inline void tegra_cpu_out_of_reset(u32 cpu)
+{
+	if (WARN_ON(!tegra_cpu_car_ops->out_of_reset))
+		return;
+
+	tegra_cpu_car_ops->out_of_reset(cpu);
+}
+
+static inline void tegra_enable_cpu_clock(u32 cpu)
+{
+	if (WARN_ON(!tegra_cpu_car_ops->enable_clock))
+		return;
+
+	tegra_cpu_car_ops->enable_clock(cpu);
+}
+
+static inline void tegra_disable_cpu_clock(u32 cpu)
+{
+	if (WARN_ON(!tegra_cpu_car_ops->disable_clock))
+		return;
+
+	tegra_cpu_car_ops->disable_clock(cpu);
+}
+
+#ifdef CONFIG_PM_SLEEP
+static inline bool tegra_cpu_rail_off_ready(void)
+{
+	if (WARN_ON(!tegra_cpu_car_ops->rail_off_ready))
+		return false;
+
+	return tegra_cpu_car_ops->rail_off_ready();
+}
+
+static inline void tegra_cpu_clock_suspend(void)
+{
+	if (WARN_ON(!tegra_cpu_car_ops->suspend))
+		return;
+
+	tegra_cpu_car_ops->suspend();
+}
+
+static inline void tegra_cpu_clock_resume(void)
+{
+	if (WARN_ON(!tegra_cpu_car_ops->resume))
+		return;
+
+	tegra_cpu_car_ops->resume();
+}
+#endif
+
+void tegra_periph_reset_deassert(struct clk *c);
+void tegra_periph_reset_assert(struct clk *c);
+void tegra_clocks_apply_init_table(void);
+
+#endif /* __LINUX_CLK_TEGRA_H_ */

include/linux/clk/tegra124-dfll.h

@@ -0,0 +1,97 @@
+/*
+ * tegra124-dfll.h - prototypes and macros for the Tegra T124 DFLL clock source
+ *
+ * Copyright (C) 2012-2013 NVIDIA Corporation.
+ * Aleksandr Frid <afrid@nvidia.com>
+ * Paul Walmsley <pwalmsley@nvidia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _LINUX_CLK_TEGRA124_DFLL_H_
+#define _LINUX_CLK_TEGRA124_DFLL_H_
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/thermal.h>
+
+enum tegra_dfll_therm_type {
+	TEGRA_DFLL_THERM_FLOOR = 0,
+	TEGRA_DFLL_THERM_CAP,
+};
+
+/* Function prototypes */
+
+#ifdef CONFIG_CLK_TEGRA_T124_DFLL
+extern int tegra124_dfll_suspend(struct platform_device *pdev);
+extern void tegra124_dfll_resume(struct platform_device *pdev);
+extern int tegra124_dfll_lock_loop(void);
+extern int tegra124_dfll_unlock_loop(void);
+extern int tegra124_dfll_get_fv_table(int *num_freqs, unsigned long **freqs,
+		int **millivolts);
+
+/* Thermal interface */
+extern int tegra124_dfll_update_thermal_index(struct platform_device *pdev,
+					      enum tegra_dfll_therm_type type,
+					      unsigned long new_idx);
+extern int tegra124_dfll_get_thermal_index(struct platform_device *pdev,
+					   enum tegra_dfll_therm_type type);
+extern int tegra124_dfll_count_therm_states(struct platform_device *pdev,
+					    enum tegra_dfll_therm_type type);
+extern int tegra124_dfll_get_therm_state_temp(struct platform_device *pdev,
+					      enum tegra_dfll_therm_type type,
+					      unsigned long index);
+extern int tegra124_dfll_attach_thermal(struct platform_device *pdev,
+					enum tegra_dfll_therm_type type,
+					struct thermal_cooling_device *cdev);
+extern int tegra124_dfll_detach_thermal(struct platform_device *pdev,
+					enum tegra_dfll_therm_type type,
+					struct thermal_cooling_device *cdev);
+#else
+static inline int tegra124_dfll_suspend(struct platform_device *pdev)
+{ return 0; }
+static inline void tegra124_dfll_resume(struct platform_device *pdev)
+{ }
+static inline int tegra124_dfll_lock_loop(void)
+{ return -EPERM; }
+static inline int tegra124_dfll_unlock_loop(void)
+{ return -EPERM; }
+static inline int tegra124_dfll_get_fv_table(int *num_freqs,
+		unsigned long **freqs, int **millivolts)
+{return -EPERM; }
+static inline int tegra124_dfll_update_thermal_index(
+						struct platform_device *pdev,
+						enum tegra_dfll_therm_type type,
+						unsigned long new_idx)
+{ return 0; }
+static inline int tegra124_dfll_get_thermal_index(struct platform_device *pdev,
+						enum tegra_dfll_therm_type type)
+{ return 0; }
+static inline int tegra124_dfll_count_therm_states(struct platform_device *pdev,
+						enum tegra_dfll_therm_type type)
+{ return 0; }
+static inline int tegra124_dfll_get_therm_state_temp(
+						struct platform_device *pdev,
+						enum tegra_dfll_therm_type type,
+						unsigned long index)
+{ return -EINVAL; }
+static inline int tegra124_dfll_attach_thermal(struct platform_device *pdev,
+					enum tegra_dfll_therm_type type,
+					struct thermal_cooling_device *cdev)
+{ return 0; }
+static inline int tegra124_dfll_detach_thermal(struct platform_device *pdev,
+					enum tegra_dfll_therm_type type,
+					struct thermal_cooling_device *cdev)
+{ return 0; }
+#endif
+#endif

include/linux/clk/zynq.h

@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2012 National Instruments
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __LINUX_CLK_ZYNQ_H_
+#define __LINUX_CLK_ZYNQ_H_
+
+void __init xilinx_zynq_clocks_init(void __iomem *slcr);
+
+#endif