nathan/Chromebook-Device-Nyan-NVIDIA-Tegra-K1-T124-Upstream-Linux-3.10-LTS-Kernel
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Initial commit; kernel source import

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Nathan
2025-04-06 23:50:55 -05:00
commit 25c6d769f4
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21
arch/mips/powertv/asic/Makefile Normal file
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#
# Copyright (C) 2009 Scientific-Atlanta, Inc.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
obj-y += asic-calliope.o asic-cronus.o asic-gaia.o asic-zeus.o \
asic_devices.o asic_int.o irq_asic.o prealloc-calliope.o \
prealloc-cronus.o prealloc-cronuslite.o prealloc-gaia.o prealloc-zeus.o

101
arch/mips/powertv/asic/asic-calliope.c Normal file
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/*
* Locations of devices in the Calliope ASIC.
*
* Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* Author: Ken Eppinett
* David Schleef <ds@schleef.org>
*
* Description: Defines the platform resources for the SA settop.
*/
#include <linux/init.h>
#include <asm/mach-powertv/asic.h>
#define CALLIOPE_ADDR(x) (CALLIOPE_IO_BASE + (x))
const struct register_map calliope_register_map __initconst = {
.eic_slow0_strt_add = {.phys = CALLIOPE_ADDR(0x800000)},
.eic_cfg_bits = {.phys = CALLIOPE_ADDR(0x800038)},
.eic_ready_status = {.phys = CALLIOPE_ADDR(0x80004c)},
.chipver3 = {.phys = CALLIOPE_ADDR(0xA00800)},
.chipver2 = {.phys = CALLIOPE_ADDR(0xA00804)},
.chipver1 = {.phys = CALLIOPE_ADDR(0xA00808)},
.chipver0 = {.phys = CALLIOPE_ADDR(0xA0080c)},
/* The registers of IRBlaster */
.uart1_intstat = {.phys = CALLIOPE_ADDR(0xA01800)},
.uart1_inten = {.phys = CALLIOPE_ADDR(0xA01804)},
.uart1_config1 = {.phys = CALLIOPE_ADDR(0xA01808)},
.uart1_config2 = {.phys = CALLIOPE_ADDR(0xA0180C)},
.uart1_divisorhi = {.phys = CALLIOPE_ADDR(0xA01810)},
.uart1_divisorlo = {.phys = CALLIOPE_ADDR(0xA01814)},
.uart1_data = {.phys = CALLIOPE_ADDR(0xA01818)},
.uart1_status = {.phys = CALLIOPE_ADDR(0xA0181C)},
.int_stat_3 = {.phys = CALLIOPE_ADDR(0xA02800)},
.int_stat_2 = {.phys = CALLIOPE_ADDR(0xA02804)},
.int_stat_1 = {.phys = CALLIOPE_ADDR(0xA02808)},
.int_stat_0 = {.phys = CALLIOPE_ADDR(0xA0280c)},
.int_config = {.phys = CALLIOPE_ADDR(0xA02810)},
.int_int_scan = {.phys = CALLIOPE_ADDR(0xA02818)},
.ien_int_3 = {.phys = CALLIOPE_ADDR(0xA02830)},
.ien_int_2 = {.phys = CALLIOPE_ADDR(0xA02834)},
.ien_int_1 = {.phys = CALLIOPE_ADDR(0xA02838)},
.ien_int_0 = {.phys = CALLIOPE_ADDR(0xA0283c)},
.int_level_3_3 = {.phys = CALLIOPE_ADDR(0xA02880)},
.int_level_3_2 = {.phys = CALLIOPE_ADDR(0xA02884)},
.int_level_3_1 = {.phys = CALLIOPE_ADDR(0xA02888)},
.int_level_3_0 = {.phys = CALLIOPE_ADDR(0xA0288c)},
.int_level_2_3 = {.phys = CALLIOPE_ADDR(0xA02890)},
.int_level_2_2 = {.phys = CALLIOPE_ADDR(0xA02894)},
.int_level_2_1 = {.phys = CALLIOPE_ADDR(0xA02898)},
.int_level_2_0 = {.phys = CALLIOPE_ADDR(0xA0289c)},
.int_level_1_3 = {.phys = CALLIOPE_ADDR(0xA028a0)},
.int_level_1_2 = {.phys = CALLIOPE_ADDR(0xA028a4)},
.int_level_1_1 = {.phys = CALLIOPE_ADDR(0xA028a8)},
.int_level_1_0 = {.phys = CALLIOPE_ADDR(0xA028ac)},
.int_level_0_3 = {.phys = CALLIOPE_ADDR(0xA028b0)},
.int_level_0_2 = {.phys = CALLIOPE_ADDR(0xA028b4)},
.int_level_0_1 = {.phys = CALLIOPE_ADDR(0xA028b8)},
.int_level_0_0 = {.phys = CALLIOPE_ADDR(0xA028bc)},
.int_docsis_en = {.phys = CALLIOPE_ADDR(0xA028F4)},
.mips_pll_setup = {.phys = CALLIOPE_ADDR(0x980000)},
.fs432x4b4_usb_ctl = {.phys = CALLIOPE_ADDR(0x980030)},
.test_bus = {.phys = CALLIOPE_ADDR(0x9800CC)},
.crt_spare = {.phys = CALLIOPE_ADDR(0x9800d4)},
.usb2_ohci_int_mask = {.phys = CALLIOPE_ADDR(0x9A000c)},
.usb2_strap = {.phys = CALLIOPE_ADDR(0x9A0014)},
.ehci_hcapbase = {.phys = CALLIOPE_ADDR(0x9BFE00)},
.ohci_hc_revision = {.phys = CALLIOPE_ADDR(0x9BFC00)},
.bcm1_bs_lmi_steer = {.phys = CALLIOPE_ADDR(0x9E0004)},
.usb2_control = {.phys = CALLIOPE_ADDR(0x9E0054)},
.usb2_stbus_obc = {.phys = CALLIOPE_ADDR(0x9BFF00)},
.usb2_stbus_mess_size = {.phys = CALLIOPE_ADDR(0x9BFF04)},
.usb2_stbus_chunk_size = {.phys = CALLIOPE_ADDR(0x9BFF08)},
.pcie_regs = {.phys = 0x000000}, /* -doesn't exist- */
.tim_ch = {.phys = CALLIOPE_ADDR(0xA02C10)},
.tim_cl = {.phys = CALLIOPE_ADDR(0xA02C14)},
.gpio_dout = {.phys = CALLIOPE_ADDR(0xA02c20)},
.gpio_din = {.phys = CALLIOPE_ADDR(0xA02c24)},
.gpio_dir = {.phys = CALLIOPE_ADDR(0xA02c2C)},
.watchdog = {.phys = CALLIOPE_ADDR(0xA02c30)},
.front_panel = {.phys = 0x000000}, /* -not used- */
};

101
arch/mips/powertv/asic/asic-cronus.c Normal file
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/*
* Locations of devices in the Cronus ASIC
*
* Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* Author: Ken Eppinett
* David Schleef <ds@schleef.org>
*
* Description: Defines the platform resources for the SA settop.
*/
#include <linux/init.h>
#include <asm/mach-powertv/asic.h>
#define CRONUS_ADDR(x) (CRONUS_IO_BASE + (x))
const struct register_map cronus_register_map __initconst = {
.eic_slow0_strt_add = {.phys = CRONUS_ADDR(0x000000)},
.eic_cfg_bits = {.phys = CRONUS_ADDR(0x000038)},
.eic_ready_status = {.phys = CRONUS_ADDR(0x00004C)},
.chipver3 = {.phys = CRONUS_ADDR(0x2A0800)},
.chipver2 = {.phys = CRONUS_ADDR(0x2A0804)},
.chipver1 = {.phys = CRONUS_ADDR(0x2A0808)},
.chipver0 = {.phys = CRONUS_ADDR(0x2A080C)},
/* The registers of IRBlaster */
.uart1_intstat = {.phys = CRONUS_ADDR(0x2A1800)},
.uart1_inten = {.phys = CRONUS_ADDR(0x2A1804)},
.uart1_config1 = {.phys = CRONUS_ADDR(0x2A1808)},
.uart1_config2 = {.phys = CRONUS_ADDR(0x2A180C)},
.uart1_divisorhi = {.phys = CRONUS_ADDR(0x2A1810)},
.uart1_divisorlo = {.phys = CRONUS_ADDR(0x2A1814)},
.uart1_data = {.phys = CRONUS_ADDR(0x2A1818)},
.uart1_status = {.phys = CRONUS_ADDR(0x2A181C)},
.int_stat_3 = {.phys = CRONUS_ADDR(0x2A2800)},
.int_stat_2 = {.phys = CRONUS_ADDR(0x2A2804)},
.int_stat_1 = {.phys = CRONUS_ADDR(0x2A2808)},
.int_stat_0 = {.phys = CRONUS_ADDR(0x2A280C)},
.int_config = {.phys = CRONUS_ADDR(0x2A2810)},
.int_int_scan = {.phys = CRONUS_ADDR(0x2A2818)},
.ien_int_3 = {.phys = CRONUS_ADDR(0x2A2830)},
.ien_int_2 = {.phys = CRONUS_ADDR(0x2A2834)},
.ien_int_1 = {.phys = CRONUS_ADDR(0x2A2838)},
.ien_int_0 = {.phys = CRONUS_ADDR(0x2A283C)},
.int_level_3_3 = {.phys = CRONUS_ADDR(0x2A2880)},
.int_level_3_2 = {.phys = CRONUS_ADDR(0x2A2884)},
.int_level_3_1 = {.phys = CRONUS_ADDR(0x2A2888)},
.int_level_3_0 = {.phys = CRONUS_ADDR(0x2A288C)},
.int_level_2_3 = {.phys = CRONUS_ADDR(0x2A2890)},
.int_level_2_2 = {.phys = CRONUS_ADDR(0x2A2894)},
.int_level_2_1 = {.phys = CRONUS_ADDR(0x2A2898)},
.int_level_2_0 = {.phys = CRONUS_ADDR(0x2A289C)},
.int_level_1_3 = {.phys = CRONUS_ADDR(0x2A28A0)},
.int_level_1_2 = {.phys = CRONUS_ADDR(0x2A28A4)},
.int_level_1_1 = {.phys = CRONUS_ADDR(0x2A28A8)},
.int_level_1_0 = {.phys = CRONUS_ADDR(0x2A28AC)},
.int_level_0_3 = {.phys = CRONUS_ADDR(0x2A28B0)},
.int_level_0_2 = {.phys = CRONUS_ADDR(0x2A28B4)},
.int_level_0_1 = {.phys = CRONUS_ADDR(0x2A28B8)},
.int_level_0_0 = {.phys = CRONUS_ADDR(0x2A28BC)},
.int_docsis_en = {.phys = CRONUS_ADDR(0x2A28F4)},
.mips_pll_setup = {.phys = CRONUS_ADDR(0x1C0000)},
.fs432x4b4_usb_ctl = {.phys = CRONUS_ADDR(0x1C0028)},
.test_bus = {.phys = CRONUS_ADDR(0x1C00CC)},
.crt_spare = {.phys = CRONUS_ADDR(0x1c00d4)},
.usb2_ohci_int_mask = {.phys = CRONUS_ADDR(0x20000C)},
.usb2_strap = {.phys = CRONUS_ADDR(0x200014)},
.ehci_hcapbase = {.phys = CRONUS_ADDR(0x21FE00)},
.ohci_hc_revision = {.phys = CRONUS_ADDR(0x21fc00)},
.bcm1_bs_lmi_steer = {.phys = CRONUS_ADDR(0x2E0008)},
.usb2_control = {.phys = CRONUS_ADDR(0x2E004C)},
.usb2_stbus_obc = {.phys = CRONUS_ADDR(0x21FF00)},
.usb2_stbus_mess_size = {.phys = CRONUS_ADDR(0x21FF04)},
.usb2_stbus_chunk_size = {.phys = CRONUS_ADDR(0x21FF08)},
.pcie_regs = {.phys = CRONUS_ADDR(0x220000)},
.tim_ch = {.phys = CRONUS_ADDR(0x2A2C10)},
.tim_cl = {.phys = CRONUS_ADDR(0x2A2C14)},
.gpio_dout = {.phys = CRONUS_ADDR(0x2A2C20)},
.gpio_din = {.phys = CRONUS_ADDR(0x2A2C24)},
.gpio_dir = {.phys = CRONUS_ADDR(0x2A2C2C)},
.watchdog = {.phys = CRONUS_ADDR(0x2A2C30)},
.front_panel = {.phys = CRONUS_ADDR(0x2A3800)},
};

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arch/mips/powertv/asic/asic-gaia.c Normal file
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/*
* Locations of devices in the Gaia ASIC
*
* Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* Author: David VomLehn
*/
#include <linux/init.h>
#include <asm/mach-powertv/asic.h>
const struct register_map gaia_register_map __initconst = {
.eic_slow0_strt_add = {.phys = GAIA_IO_BASE + 0x000000},
.eic_cfg_bits = {.phys = GAIA_IO_BASE + 0x000038},
.eic_ready_status = {.phys = GAIA_IO_BASE + 0x00004C},
.chipver3 = {.phys = GAIA_IO_BASE + 0x2A0800},
.chipver2 = {.phys = GAIA_IO_BASE + 0x2A0804},
.chipver1 = {.phys = GAIA_IO_BASE + 0x2A0808},
.chipver0 = {.phys = GAIA_IO_BASE + 0x2A080C},
/* The registers of IRBlaster */
.uart1_intstat = {.phys = GAIA_IO_BASE + 0x2A1800},
.uart1_inten = {.phys = GAIA_IO_BASE + 0x2A1804},
.uart1_config1 = {.phys = GAIA_IO_BASE + 0x2A1808},
.uart1_config2 = {.phys = GAIA_IO_BASE + 0x2A180C},
.uart1_divisorhi = {.phys = GAIA_IO_BASE + 0x2A1810},
.uart1_divisorlo = {.phys = GAIA_IO_BASE + 0x2A1814},
.uart1_data = {.phys = GAIA_IO_BASE + 0x2A1818},
.uart1_status = {.phys = GAIA_IO_BASE + 0x2A181C},
.int_stat_3 = {.phys = GAIA_IO_BASE + 0x2A2800},
.int_stat_2 = {.phys = GAIA_IO_BASE + 0x2A2804},
.int_stat_1 = {.phys = GAIA_IO_BASE + 0x2A2808},
.int_stat_0 = {.phys = GAIA_IO_BASE + 0x2A280C},
.int_config = {.phys = GAIA_IO_BASE + 0x2A2810},
.int_int_scan = {.phys = GAIA_IO_BASE + 0x2A2818},
.ien_int_3 = {.phys = GAIA_IO_BASE + 0x2A2830},
.ien_int_2 = {.phys = GAIA_IO_BASE + 0x2A2834},
.ien_int_1 = {.phys = GAIA_IO_BASE + 0x2A2838},
.ien_int_0 = {.phys = GAIA_IO_BASE + 0x2A283C},
.int_level_3_3 = {.phys = GAIA_IO_BASE + 0x2A2880},
.int_level_3_2 = {.phys = GAIA_IO_BASE + 0x2A2884},
.int_level_3_1 = {.phys = GAIA_IO_BASE + 0x2A2888},
.int_level_3_0 = {.phys = GAIA_IO_BASE + 0x2A288C},
.int_level_2_3 = {.phys = GAIA_IO_BASE + 0x2A2890},
.int_level_2_2 = {.phys = GAIA_IO_BASE + 0x2A2894},
.int_level_2_1 = {.phys = GAIA_IO_BASE + 0x2A2898},
.int_level_2_0 = {.phys = GAIA_IO_BASE + 0x2A289C},
.int_level_1_3 = {.phys = GAIA_IO_BASE + 0x2A28A0},
.int_level_1_2 = {.phys = GAIA_IO_BASE + 0x2A28A4},
.int_level_1_1 = {.phys = GAIA_IO_BASE + 0x2A28A8},
.int_level_1_0 = {.phys = GAIA_IO_BASE + 0x2A28AC},
.int_level_0_3 = {.phys = GAIA_IO_BASE + 0x2A28B0},
.int_level_0_2 = {.phys = GAIA_IO_BASE + 0x2A28B4},
.int_level_0_1 = {.phys = GAIA_IO_BASE + 0x2A28B8},
.int_level_0_0 = {.phys = GAIA_IO_BASE + 0x2A28BC},
.int_docsis_en = {.phys = GAIA_IO_BASE + 0x2A28F4},
.mips_pll_setup = {.phys = GAIA_IO_BASE + 0x1C0000},
.fs432x4b4_usb_ctl = {.phys = GAIA_IO_BASE + 0x1C0024},
.test_bus = {.phys = GAIA_IO_BASE + 0x1C00CC},
.crt_spare = {.phys = GAIA_IO_BASE + 0x1c0108},
.usb2_ohci_int_mask = {.phys = GAIA_IO_BASE + 0x20000C},
.usb2_strap = {.phys = GAIA_IO_BASE + 0x200014},
.ehci_hcapbase = {.phys = GAIA_IO_BASE + 0x21FE00},
.ohci_hc_revision = {.phys = GAIA_IO_BASE + 0x21fc00},
.bcm1_bs_lmi_steer = {.phys = GAIA_IO_BASE + 0x2E0004},
.usb2_control = {.phys = GAIA_IO_BASE + 0x2E004C},
.usb2_stbus_obc = {.phys = GAIA_IO_BASE + 0x21FF00},
.usb2_stbus_mess_size = {.phys = GAIA_IO_BASE + 0x21FF04},
.usb2_stbus_chunk_size = {.phys = GAIA_IO_BASE + 0x21FF08},
.pcie_regs = {.phys = GAIA_IO_BASE + 0x220000},
.tim_ch = {.phys = GAIA_IO_BASE + 0x2A2C10},
.tim_cl = {.phys = GAIA_IO_BASE + 0x2A2C14},
.gpio_dout = {.phys = GAIA_IO_BASE + 0x2A2C20},
.gpio_din = {.phys = GAIA_IO_BASE + 0x2A2C24},
.gpio_dir = {.phys = GAIA_IO_BASE + 0x2A2C2C},
.watchdog = {.phys = GAIA_IO_BASE + 0x2A2C30},
.front_panel = {.phys = GAIA_IO_BASE + 0x2A3800},
};

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arch/mips/powertv/asic/asic-zeus.c Normal file
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/*
* Locations of devices in the Zeus ASIC
*
* Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* Author: Ken Eppinett
* David Schleef <ds@schleef.org>
*
* Description: Defines the platform resources for the SA settop.
*/
#include <linux/init.h>
#include <asm/mach-powertv/asic.h>
#define ZEUS_ADDR(x) (ZEUS_IO_BASE + (x))
const struct register_map zeus_register_map __initconst = {
.eic_slow0_strt_add = {.phys = ZEUS_ADDR(0x000000)},
.eic_cfg_bits = {.phys = ZEUS_ADDR(0x000038)},
.eic_ready_status = {.phys = ZEUS_ADDR(0x00004c)},
.chipver3 = {.phys = ZEUS_ADDR(0x280800)},
.chipver2 = {.phys = ZEUS_ADDR(0x280804)},
.chipver1 = {.phys = ZEUS_ADDR(0x280808)},
.chipver0 = {.phys = ZEUS_ADDR(0x28080c)},
/* The registers of IRBlaster */
.uart1_intstat = {.phys = ZEUS_ADDR(0x281800)},
.uart1_inten = {.phys = ZEUS_ADDR(0x281804)},
.uart1_config1 = {.phys = ZEUS_ADDR(0x281808)},
.uart1_config2 = {.phys = ZEUS_ADDR(0x28180C)},
.uart1_divisorhi = {.phys = ZEUS_ADDR(0x281810)},
.uart1_divisorlo = {.phys = ZEUS_ADDR(0x281814)},
.uart1_data = {.phys = ZEUS_ADDR(0x281818)},
.uart1_status = {.phys = ZEUS_ADDR(0x28181C)},
.int_stat_3 = {.phys = ZEUS_ADDR(0x282800)},
.int_stat_2 = {.phys = ZEUS_ADDR(0x282804)},
.int_stat_1 = {.phys = ZEUS_ADDR(0x282808)},
.int_stat_0 = {.phys = ZEUS_ADDR(0x28280c)},
.int_config = {.phys = ZEUS_ADDR(0x282810)},
.int_int_scan = {.phys = ZEUS_ADDR(0x282818)},
.ien_int_3 = {.phys = ZEUS_ADDR(0x282830)},
.ien_int_2 = {.phys = ZEUS_ADDR(0x282834)},
.ien_int_1 = {.phys = ZEUS_ADDR(0x282838)},
.ien_int_0 = {.phys = ZEUS_ADDR(0x28283c)},
.int_level_3_3 = {.phys = ZEUS_ADDR(0x282880)},
.int_level_3_2 = {.phys = ZEUS_ADDR(0x282884)},
.int_level_3_1 = {.phys = ZEUS_ADDR(0x282888)},
.int_level_3_0 = {.phys = ZEUS_ADDR(0x28288c)},
.int_level_2_3 = {.phys = ZEUS_ADDR(0x282890)},
.int_level_2_2 = {.phys = ZEUS_ADDR(0x282894)},
.int_level_2_1 = {.phys = ZEUS_ADDR(0x282898)},
.int_level_2_0 = {.phys = ZEUS_ADDR(0x28289c)},
.int_level_1_3 = {.phys = ZEUS_ADDR(0x2828a0)},
.int_level_1_2 = {.phys = ZEUS_ADDR(0x2828a4)},
.int_level_1_1 = {.phys = ZEUS_ADDR(0x2828a8)},
.int_level_1_0 = {.phys = ZEUS_ADDR(0x2828ac)},
.int_level_0_3 = {.phys = ZEUS_ADDR(0x2828b0)},
.int_level_0_2 = {.phys = ZEUS_ADDR(0x2828b4)},
.int_level_0_1 = {.phys = ZEUS_ADDR(0x2828b8)},
.int_level_0_0 = {.phys = ZEUS_ADDR(0x2828bc)},
.int_docsis_en = {.phys = ZEUS_ADDR(0x2828F4)},
.mips_pll_setup = {.phys = ZEUS_ADDR(0x1a0000)},
.fs432x4b4_usb_ctl = {.phys = ZEUS_ADDR(0x1a0018)},
.test_bus = {.phys = ZEUS_ADDR(0x1a0238)},
.crt_spare = {.phys = ZEUS_ADDR(0x1a0090)},
.usb2_ohci_int_mask = {.phys = ZEUS_ADDR(0x1e000c)},
.usb2_strap = {.phys = ZEUS_ADDR(0x1e0014)},
.ehci_hcapbase = {.phys = ZEUS_ADDR(0x1FFE00)},
.ohci_hc_revision = {.phys = ZEUS_ADDR(0x1FFC00)},
.bcm1_bs_lmi_steer = {.phys = ZEUS_ADDR(0x2C0008)},
.usb2_control = {.phys = ZEUS_ADDR(0x2c01a0)},
.usb2_stbus_obc = {.phys = ZEUS_ADDR(0x1FFF00)},
.usb2_stbus_mess_size = {.phys = ZEUS_ADDR(0x1FFF04)},
.usb2_stbus_chunk_size = {.phys = ZEUS_ADDR(0x1FFF08)},
.pcie_regs = {.phys = ZEUS_ADDR(0x200000)},
.tim_ch = {.phys = ZEUS_ADDR(0x282C10)},
.tim_cl = {.phys = ZEUS_ADDR(0x282C14)},
.gpio_dout = {.phys = ZEUS_ADDR(0x282c20)},
.gpio_din = {.phys = ZEUS_ADDR(0x282c24)},
.gpio_dir = {.phys = ZEUS_ADDR(0x282c2C)},
.watchdog = {.phys = ZEUS_ADDR(0x282c30)},
.front_panel = {.phys = ZEUS_ADDR(0x283800)},
};

569
arch/mips/powertv/asic/asic_devices.c Normal file
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/*
*
* Description: Defines the platform resources for Gaia-based settops.
*
* Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* NOTE: The bootloader allocates persistent memory at an address which is
* 16 MiB below the end of the highest address in KSEG0. All fixed
* address memory reservations must avoid this region.
*/
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/resource.h>
#include <linux/serial_reg.h>
#include <linux/io.h>
#include <linux/bootmem.h>
#include <linux/mm.h>
#include <linux/platform_device.h>
#include <linux/module.h>
#include <asm/page.h>
#include <linux/swap.h>
#include <linux/highmem.h>
#include <linux/dma-mapping.h>
#include <asm/mach-powertv/asic.h>
#include <asm/mach-powertv/asic_regs.h>
#include <asm/mach-powertv/interrupts.h>
#ifdef CONFIG_BOOTLOADER_DRIVER
#include <asm/mach-powertv/kbldr.h>
#endif
#include <asm/bootinfo.h>
#define BOOTLDRFAMILY(byte1, byte0) (((byte1) << 8) | (byte0))
/*
* Forward Prototypes
*/
static void pmem_setup_resource(void);
/*
* Global Variables
*/
enum asic_type asic;
unsigned int platform_features;
unsigned int platform_family;
struct register_map _asic_register_map;
EXPORT_SYMBOL(_asic_register_map); /* Exported for testing */
unsigned long asic_phy_base;
unsigned long asic_base;
EXPORT_SYMBOL(asic_base); /* Exported for testing */
struct resource *gp_resources;
/*
* Don't recommend to use it directly, it is usually used by kernel internally.
* Portable code should be using interfaces such as ioremp, dma_map_single, etc.
*/
unsigned long phys_to_dma_offset;
EXPORT_SYMBOL(phys_to_dma_offset);
/*
*
* IO Resource Definition
*
*/
struct resource asic_resource = {
.name = "ASIC Resource",
.start = 0,
.end = ASIC_IO_SIZE,
.flags = IORESOURCE_MEM,
};
/*
* Allow override of bootloader-specified model
* Returns zero on success, a negative errno value on failure. This parameter
* allows overriding of the bootloader-specified model.
*/
static char __initdata cmdline[COMMAND_LINE_SIZE];
#define FORCEFAMILY_PARAM "forcefamily"
/*
* check_forcefamily - check for, and parse, forcefamily command line parameter
* @forced_family: Pointer to two-character array in which to store the
* value of the forcedfamily parameter, if any.
*/
static __init int check_forcefamily(unsigned char forced_family[2])
{
const char *p;
forced_family[0] = '\0';
forced_family[1] = '\0';
/* Check the command line for a forcefamily directive */
strncpy(cmdline, arcs_cmdline, COMMAND_LINE_SIZE - 1);
p = strstr(cmdline, FORCEFAMILY_PARAM);
if (p && (p != cmdline) && (*(p - 1) != ' '))
p = strstr(p, " " FORCEFAMILY_PARAM "=");
if (p) {
p += strlen(FORCEFAMILY_PARAM "=");
if (*p == '\0' || *(p + 1) == '\0' ||
(*(p + 2) != '\0' && *(p + 2) != ' '))
pr_err(FORCEFAMILY_PARAM " must be exactly two "
"characters long, ignoring value\n");
else {
forced_family[0] = *p;
forced_family[1] = *(p + 1);
}
}
return 0;
}
/*
* platform_set_family - determine major platform family type.
*
* Returns family type; -1 if none
* Returns the family type; -1 if none
*
*/
static __init noinline void platform_set_family(void)
{
unsigned char forced_family[2];
unsigned short bootldr_family;
if (check_forcefamily(forced_family) == 0)
bootldr_family = BOOTLDRFAMILY(forced_family[0],
forced_family[1]);
else {
#ifdef CONFIG_BOOTLOADER_DRIVER
bootldr_family = (unsigned short) kbldr_GetSWFamily();
#else
#if defined(CONFIG_BOOTLOADER_FAMILY)
bootldr_family = (unsigned short) BOOTLDRFAMILY(
CONFIG_BOOTLOADER_FAMILY[0],
CONFIG_BOOTLOADER_FAMILY[1]);
#else
#error "Unknown Bootloader Family"
#endif
#endif
}
pr_info("Bootloader Family = 0x%04X\n", bootldr_family);
switch (bootldr_family) {
case BOOTLDRFAMILY('R', '1'):
platform_family = FAMILY_1500;
break;
case BOOTLDRFAMILY('4', '4'):
platform_family = FAMILY_4500;
break;
case BOOTLDRFAMILY('4', '6'):
platform_family = FAMILY_4600;
break;
case BOOTLDRFAMILY('A', '1'):
platform_family = FAMILY_4600VZA;
break;
case BOOTLDRFAMILY('8', '5'):
platform_family = FAMILY_8500;
break;
case BOOTLDRFAMILY('R', '2'):
platform_family = FAMILY_8500RNG;
break;
case BOOTLDRFAMILY('8', '6'):
platform_family = FAMILY_8600;
break;
case BOOTLDRFAMILY('B', '1'):
platform_family = FAMILY_8600VZB;
break;
case BOOTLDRFAMILY('E', '1'):
platform_family = FAMILY_1500VZE;
break;
case BOOTLDRFAMILY('F', '1'):
platform_family = FAMILY_1500VZF;
break;
case BOOTLDRFAMILY('8', '7'):
platform_family = FAMILY_8700;
break;
default:
platform_family = -1;
}
}
unsigned int platform_get_family(void)
{
return platform_family;
}
EXPORT_SYMBOL(platform_get_family);
/*
* platform_get_asic - determine the ASIC type.
*
* Returns the ASIC type, or ASIC_UNKNOWN if unknown
*
*/
enum asic_type platform_get_asic(void)
{
return asic;
}
EXPORT_SYMBOL(platform_get_asic);
/*
* set_register_map - set ASIC register configuration
* @phys_base: Physical address of the base of the ASIC registers
* @map: Description of key ASIC registers
*/
static void __init set_register_map(unsigned long phys_base,
const struct register_map *map)
{
asic_phy_base = phys_base;
_asic_register_map = *map;
register_map_virtualize(&_asic_register_map);
asic_base = (unsigned long)ioremap_nocache(phys_base, ASIC_IO_SIZE);
}
/**
* configure_platform - configuration based on platform type.
*/
void __init configure_platform(void)
{
platform_set_family();
switch (platform_family) {
case FAMILY_1500:
case FAMILY_1500VZE:
case FAMILY_1500VZF:
platform_features = FFS_CAPABLE;
asic = ASIC_CALLIOPE;
set_register_map(CALLIOPE_IO_BASE, &calliope_register_map);
if (platform_family == FAMILY_1500VZE) {
gp_resources = non_dvr_vze_calliope_resources;
pr_info("Platform: 1500/Vz Class E - "
"CALLIOPE, NON_DVR_CAPABLE\n");
} else if (platform_family == FAMILY_1500VZF) {
gp_resources = non_dvr_vzf_calliope_resources;
pr_info("Platform: 1500/Vz Class F - "
"CALLIOPE, NON_DVR_CAPABLE\n");
} else {
gp_resources = non_dvr_calliope_resources;
pr_info("Platform: 1500/RNG100 - CALLIOPE, "
"NON_DVR_CAPABLE\n");
}
break;
case FAMILY_4500:
platform_features = FFS_CAPABLE | PCIE_CAPABLE |
DISPLAY_CAPABLE;
asic = ASIC_ZEUS;
set_register_map(ZEUS_IO_BASE, &zeus_register_map);
gp_resources = non_dvr_zeus_resources;
pr_info("Platform: 4500 - ZEUS, NON_DVR_CAPABLE\n");
break;
case FAMILY_4600:
{
unsigned int chipversion = 0;
/* The settop has PCIE but it isn't used, so don't advertise
* it*/
platform_features = FFS_CAPABLE | DISPLAY_CAPABLE;
/* Cronus and Cronus Lite have the same register map */
set_register_map(CRONUS_IO_BASE, &cronus_register_map);
/* ASIC version will determine if this is a real CronusLite or
* Castrati(Cronus) */
chipversion = asic_read(chipver3) << 24;
chipversion |= asic_read(chipver2) << 16;
chipversion |= asic_read(chipver1) << 8;
chipversion |= asic_read(chipver0);
if ((chipversion == CRONUS_10) || (chipversion == CRONUS_11))
asic = ASIC_CRONUS;
else
asic = ASIC_CRONUSLITE;
gp_resources = non_dvr_cronuslite_resources;
pr_info("Platform: 4600 - %s, NON_DVR_CAPABLE, "
"chipversion=0x%08X\n",
(asic == ASIC_CRONUS) ? "CRONUS" : "CRONUS LITE",
chipversion);
break;
}
case FAMILY_4600VZA:
platform_features = FFS_CAPABLE | DISPLAY_CAPABLE;
asic = ASIC_CRONUS;
set_register_map(CRONUS_IO_BASE, &cronus_register_map);
gp_resources = non_dvr_cronus_resources;
pr_info("Platform: Vz Class A - CRONUS, NON_DVR_CAPABLE\n");
break;
case FAMILY_8500:
case FAMILY_8500RNG:
platform_features = DVR_CAPABLE | PCIE_CAPABLE |
DISPLAY_CAPABLE;
asic = ASIC_ZEUS;
set_register_map(ZEUS_IO_BASE, &zeus_register_map);
gp_resources = dvr_zeus_resources;
pr_info("Platform: 8500/RNG200 - ZEUS, DVR_CAPABLE\n");
break;
case FAMILY_8600:
case FAMILY_8600VZB:
platform_features = DVR_CAPABLE | PCIE_CAPABLE |
DISPLAY_CAPABLE;
asic = ASIC_CRONUS;
set_register_map(CRONUS_IO_BASE, &cronus_register_map);
gp_resources = dvr_cronus_resources;
pr_info("Platform: 8600/Vz Class B - CRONUS, "
"DVR_CAPABLE\n");
break;
case FAMILY_8700:
platform_features = FFS_CAPABLE | PCIE_CAPABLE;
asic = ASIC_GAIA;
set_register_map(GAIA_IO_BASE, &gaia_register_map);
gp_resources = dvr_gaia_resources;
pr_info("Platform: 8700 - GAIA, DVR_CAPABLE\n");
break;
default:
pr_crit("Platform: UNKNOWN PLATFORM\n");
break;
}
switch (asic) {
case ASIC_ZEUS:
phys_to_dma_offset = 0x30000000;
break;
case ASIC_CALLIOPE:
phys_to_dma_offset = 0x10000000;
break;
case ASIC_CRONUSLITE:
/* Fall through */
case ASIC_CRONUS:
/*
* TODO: We suppose 0x10000000 aliases into 0x20000000-
* 0x2XXXXXXX. If 0x10000000 aliases into 0x60000000-
* 0x6XXXXXXX, the offset should be 0x50000000, not 0x10000000.
*/
phys_to_dma_offset = 0x10000000;
break;
default:
phys_to_dma_offset = 0x00000000;
break;
}
}
/*
* RESOURCE ALLOCATION
*
*/
/*
* Allocates/reserves the Platform memory resources early in the boot process.
* This ignores any resources that are designated IORESOURCE_IO
*/
void __init platform_alloc_bootmem(void)
{
int i;
int total = 0;
/* Get persistent memory data from command line before allocating
* resources. This need to happen before normal command line parsing
* has been done */
pmem_setup_resource();
/* Loop through looking for resources that want a particular address */
for (i = 0; gp_resources[i].flags != 0; i++) {
int size = resource_size(&gp_resources[i]);
if ((gp_resources[i].start != 0) &&
((gp_resources[i].flags & IORESOURCE_MEM) != 0)) {
reserve_bootmem(dma_to_phys(gp_resources[i].start),
size, 0);
total += resource_size(&gp_resources[i]);
pr_info("reserve resource %s at %08x (%u bytes)\n",
gp_resources[i].name, gp_resources[i].start,
resource_size(&gp_resources[i]));
}
}
/* Loop through assigning addresses for those that are left */
for (i = 0; gp_resources[i].flags != 0; i++) {
int size = resource_size(&gp_resources[i]);
if ((gp_resources[i].start == 0) &&
((gp_resources[i].flags & IORESOURCE_MEM) != 0)) {
void *mem = alloc_bootmem_pages(size);
if (mem == NULL)
pr_err("Unable to allocate bootmem pages "
"for %s\n", gp_resources[i].name);
else {
gp_resources[i].start =
phys_to_dma(virt_to_phys(mem));
gp_resources[i].end =
gp_resources[i].start + size - 1;
total += size;
pr_info("allocate resource %s at %08x "
"(%u bytes)\n",
gp_resources[i].name,
gp_resources[i].start, size);
}
}
}
pr_info("Total Platform driver memory allocation: 0x%08x\n", total);
/* indicate resources that are platform I/O related */
for (i = 0; gp_resources[i].flags != 0; i++) {
if ((gp_resources[i].start != 0) &&
((gp_resources[i].flags & IORESOURCE_IO) != 0)) {
pr_info("reserved platform resource %s at %08x\n",
gp_resources[i].name, gp_resources[i].start);
}
}
}
/*
*
* PERSISTENT MEMORY (PMEM) CONFIGURATION
*
*/
static unsigned long pmemaddr __initdata;
static int __init early_param_pmemaddr(char *p)
{
pmemaddr = (unsigned long)simple_strtoul(p, NULL, 0);
return 0;
}
early_param("pmemaddr", early_param_pmemaddr);
static long pmemlen __initdata;
static int __init early_param_pmemlen(char *p)
{
/* TODO: we can use this code when and if the bootloader ever changes this */
#if 0
pmemlen = (unsigned long)simple_strtoul(p, NULL, 0);
#else
pmemlen = 0x20000;
#endif
return 0;
}
early_param("pmemlen", early_param_pmemlen);
/*
* Set up persistent memory. If we were given values, we patch the array of
* resources. Otherwise, persistent memory may be allocated anywhere at all.
*/
static void __init pmem_setup_resource(void)
{
struct resource *resource;
resource = asic_resource_get("DiagPersistentMemory");
if (resource && pmemaddr && pmemlen) {
/* The address provided by bootloader is in kseg0. Convert to
* a bus address. */
resource->start = phys_to_dma(pmemaddr - 0x80000000);
resource->end = resource->start + pmemlen - 1;
pr_info("persistent memory: start=0x%x end=0x%x\n",
resource->start, resource->end);
}
}
/*
*
* RESOURCE ACCESS FUNCTIONS
*
*/
/**
* asic_resource_get - retrieves parameters for a platform resource.
* @name: string to match resource
*
* Returns a pointer to a struct resource corresponding to the given name.
*
* CANNOT BE NAMED platform_resource_get, which would be the obvious choice,
* as this function name is already declared
*/
struct resource *asic_resource_get(const char *name)
{
int i;
for (i = 0; gp_resources[i].flags != 0; i++) {
if (strcmp(gp_resources[i].name, name) == 0)
return &gp_resources[i];
}
return NULL;
}
EXPORT_SYMBOL(asic_resource_get);
/**
* platform_release_memory - release pre-allocated memory
* @ptr: pointer to memory to release
* @size: size of resource
*
* This must only be called for memory allocated or reserved via the boot
* memory allocator.
*/
void platform_release_memory(void *ptr, int size)
{
unsigned long addr;
unsigned long end;
addr = ((unsigned long)ptr + (PAGE_SIZE - 1)) & PAGE_MASK;
end = ((unsigned long)ptr + size) & PAGE_MASK;
for (; addr < end; addr += PAGE_SIZE) {
ClearPageReserved(virt_to_page(__va(addr)));
init_page_count(virt_to_page(__va(addr)));
free_page((unsigned long)__va(addr));
}
}
EXPORT_SYMBOL(platform_release_memory);
/*
*
* FEATURE AVAILABILITY FUNCTIONS
*
*/
int platform_supports_dvr(void)
{
return (platform_features & DVR_CAPABLE) != 0;
}
int platform_supports_ffs(void)
{
return (platform_features & FFS_CAPABLE) != 0;
}
int platform_supports_pcie(void)
{
return (platform_features & PCIE_CAPABLE) != 0;
}
int platform_supports_display(void)
{
return (platform_features & DISPLAY_CAPABLE) != 0;
}

125
arch/mips/powertv/asic/asic_int.c Normal file
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/*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000, 2001, 2004 MIPS Technologies, Inc.
* Copyright (C) 2001 Ralf Baechle
* Portions copyright (C) 2009 Cisco Systems, Inc.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* Routines for generic manipulation of the interrupts found on the PowerTV
* platform.
*
* The interrupt controller is located in the South Bridge a PIIX4 device
* with two internal 82C95 interrupt controllers.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <linux/kernel.h>
#include <linux/random.h>
#include <asm/irq_cpu.h>
#include <linux/io.h>
#include <asm/irq_regs.h>
#include <asm/setup.h>
#include <asm/mips-boards/generic.h>
#include <asm/mach-powertv/asic_regs.h>
static DEFINE_RAW_SPINLOCK(asic_irq_lock);
static inline int get_int(void)
{
unsigned long flags;
int irq;
raw_spin_lock_irqsave(&asic_irq_lock, flags);
irq = (asic_read(int_int_scan) >> 4) - 1;
if (irq == 0 || irq >= NR_IRQS)
irq = -1;
raw_spin_unlock_irqrestore(&asic_irq_lock, flags);
return irq;
}
static void asic_irqdispatch(void)
{
int irq;
irq = get_int();
if (irq < 0)
return; /* interrupt has already been cleared */
do_IRQ(irq);
}
static inline int clz(unsigned long x)
{
__asm__(
" .set push \n"
" .set mips32 \n"
" clz %0, %1 \n"
" .set pop \n"
: "=r" (x)
: "r" (x));
return x;
}
/*
* Version of ffs that only looks at bits 12..15.
*/
static inline unsigned int irq_ffs(unsigned int pending)
{
return fls(pending) - 1 + CAUSEB_IP;
}
/*
* TODO: check how it works under EIC mode.
*/
asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
int irq;
irq = irq_ffs(pending);
if (irq == CAUSEF_IP3)
asic_irqdispatch();
else if (irq >= 0)
do_IRQ(irq);
else
spurious_interrupt();
}
void __init arch_init_irq(void)
{
int i;
asic_irq_init();
/*
* Initialize interrupt exception vectors.
*/
if (cpu_has_veic || cpu_has_vint) {
int nvec = cpu_has_veic ? 64 : 8;
for (i = 0; i < nvec; i++)
set_vi_handler(i, asic_irqdispatch);
}
}

115
arch/mips/powertv/asic/irq_asic.c Normal file
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/*
* Portions copyright (C) 2005-2009 Scientific Atlanta
* Portions copyright (C) 2009 Cisco Systems, Inc.
*
* Modified from arch/mips/kernel/irq-rm7000.c:
* Copyright (C) 2003 Ralf Baechle
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/irq.h>
#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
#include <asm/mach-powertv/asic_regs.h>
static inline void unmask_asic_irq(struct irq_data *d)
{
unsigned long enable_bit;
unsigned int irq = d->irq;
enable_bit = (1 << (irq & 0x1f));
switch (irq >> 5) {
case 0:
asic_write(asic_read(ien_int_0) | enable_bit, ien_int_0);
break;
case 1:
asic_write(asic_read(ien_int_1) | enable_bit, ien_int_1);
break;
case 2:
asic_write(asic_read(ien_int_2) | enable_bit, ien_int_2);
break;
case 3:
asic_write(asic_read(ien_int_3) | enable_bit, ien_int_3);
break;
default:
BUG();
}
}
static inline void mask_asic_irq(struct irq_data *d)
{
unsigned long disable_mask;
unsigned int irq = d->irq;
disable_mask = ~(1 << (irq & 0x1f));
switch (irq >> 5) {
case 0:
asic_write(asic_read(ien_int_0) & disable_mask, ien_int_0);
break;
case 1:
asic_write(asic_read(ien_int_1) & disable_mask, ien_int_1);
break;
case 2:
asic_write(asic_read(ien_int_2) & disable_mask, ien_int_2);
break;
case 3:
asic_write(asic_read(ien_int_3) & disable_mask, ien_int_3);
break;
default:
BUG();
}
}
static struct irq_chip asic_irq_chip = {
.name = "ASIC Level",
.irq_mask = mask_asic_irq,
.irq_unmask = unmask_asic_irq,
};
void __init asic_irq_init(void)
{
int i;
/* set priority to 0 */
write_c0_status(read_c0_status() & ~(0x0000fc00));
asic_write(0, ien_int_0);
asic_write(0, ien_int_1);
asic_write(0, ien_int_2);
asic_write(0, ien_int_3);
asic_write(0x0fffffff, int_level_3_3);
asic_write(0xffffffff, int_level_3_2);
asic_write(0xffffffff, int_level_3_1);
asic_write(0xffffffff, int_level_3_0);
asic_write(0xffffffff, int_level_2_3);
asic_write(0xffffffff, int_level_2_2);
asic_write(0xffffffff, int_level_2_1);
asic_write(0xffffffff, int_level_2_0);
asic_write(0xffffffff, int_level_1_3);
asic_write(0xffffffff, int_level_1_2);
asic_write(0xffffffff, int_level_1_1);
asic_write(0xffffffff, int_level_1_0);
asic_write(0xffffffff, int_level_0_3);
asic_write(0xffffffff, int_level_0_2);
asic_write(0xffffffff, int_level_0_1);
asic_write(0xffffffff, int_level_0_0);
asic_write(0xf, int_int_scan);
/*
* Initialize interrupt handlers.
*/
for (i = 0; i < NR_IRQS; i++)
irq_set_chip_and_handler(i, &asic_irq_chip, handle_level_irq);
}

385
arch/mips/powertv/asic/prealloc-calliope.c Normal file
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/*
* Memory pre-allocations for Calliope boxes.
*
* Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* Author: Ken Eppinett
* David Schleef <ds@schleef.org>
*/
#include <linux/init.h>
#include <linux/ioport.h>
#include <asm/mach-powertv/asic.h>
#include "prealloc.h"
/*
* NON_DVR_CAPABLE CALLIOPE RESOURCES
*/
struct resource non_dvr_calliope_resources[] __initdata =
{
/*
* VIDEO / LX1
*/
/* Delta-Mu 1 image (2MiB) */
PREALLOC_NORMAL("ST231aImage", 0x24000000, 0x24200000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 monitor (8KiB) */
PREALLOC_NORMAL("ST231aMonitor", 0x24200000, 0x24202000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 RAM (~36.9MiB (32MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory1", 0x24202000, 0x26700000-1,
IORESOURCE_MEM)
/*
* Sysaudio Driver
*/
/* DSP code and data images (1MiB) */
PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC CPU PCM buffer (40KiB) */
PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC AUX buffer (128KiB) */
PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC Main buffer (128KiB) */
PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* STAVEM driver/STAPI
*/
/* 6MiB */
PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00600000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* DOCSIS Subsystem
*/
/* 7MiB */
PREALLOC_DOCSIS("Docsis", 0x27500000, 0x27c00000-1, IORESOURCE_MEM)
/*
* GHW HAL Driver
*/
/* PowerTV Graphics Heap (14MiB) */
PREALLOC_NORMAL("GraphicsHeap", 0x26700000, 0x26700000+(14*1048576)-1,
IORESOURCE_MEM)
/*
* multi com buffer area
*/
/* 128KiB */
PREALLOC_NORMAL("MulticomSHM", 0x23700000, 0x23720000-1,
IORESOURCE_MEM)
/*
* DMA Ring buffer (don't need recording buffers)
*/
/* 680KiB */
PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Display bins buffer for unit0
*/
/* 4KiB */
PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* AVFS: player HAL memory
*/
/* 945K * 3 for playback */
PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* PMEM
*/
/* Persistent memory for diagnostics (64KiB) */
PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Smartcard
*/
/* Read and write buffers for Internal/External cards (10KiB) */
PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* NAND Flash
*/
/* 10KiB */
PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1,
IORESOURCE_MEM)
/*
* Synopsys GMAC Memory Region
*/
/* 64KiB */
PREALLOC_NORMAL("GMAC", 0x00000000, 0x00010000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* TFTPBuffer
*
* This buffer is used in some minimal configurations (e.g. two-way
* loader) for storing software images
*/
PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Add other resources here
*/
/*
* End of Resource marker
*/
{
.flags = 0,
},
};
struct resource non_dvr_vze_calliope_resources[] __initdata =
{
/*
* VIDEO / LX1
*/
/* Delta-Mu 1 image (2MiB) */
PREALLOC_NORMAL("ST231aImage", 0x22000000, 0x22200000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 monitor (8KiB) */
PREALLOC_NORMAL("ST231aMonitor", 0x22200000, 0x22202000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 RAM (10.12MiB) */
PREALLOC_NORMAL("MediaMemory1", 0x22202000, 0x22C20B85-1,
IORESOURCE_MEM)
/*
* Sysaudio Driver
*/
/* DSP code and data images (1MiB) */
PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC CPU PCM buffer (40KiB) */
PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC AUX buffer (16KiB) */
PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00004000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC Main buffer (16KiB) */
PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00004000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* STAVEM driver/STAPI
*/
/* 3.125MiB */
PREALLOC_NORMAL("AVMEMPartition0", 0x20396000, 0x206B6000-1,
IORESOURCE_MEM)
/*
* GHW HAL Driver
*/
/* PowerTV Graphics Heap (2.59MiB) */
PREALLOC_NORMAL("GraphicsHeap", 0x20100000, 0x20396000-1,
IORESOURCE_MEM)
/*
* multi com buffer area
*/
/* 128KiB */
PREALLOC_NORMAL("MulticomSHM", 0x206B6000, 0x206D6000-1,
IORESOURCE_MEM)
/*
* DMA Ring buffer (don't need recording buffers)
*/
/* 680KiB */
PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Display bins buffer for unit0
*/
/* 4KiB */
PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* PMEM
*/
/* Persistent memory for diagnostics (64KiB) */
PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Smartcard
*/
/* Read and write buffers for Internal/External cards (10KiB) */
PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* NAND Flash
*/
/* 10KiB */
PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1,
IORESOURCE_MEM)
/*
* Synopsys GMAC Memory Region
*/
/* 64KiB */
PREALLOC_NORMAL("GMAC", 0x00000000, 0x00010000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Add other resources here
*/
/*
* End of Resource marker
*/
{
.flags = 0,
},
};
struct resource non_dvr_vzf_calliope_resources[] __initdata =
{
/*
* VIDEO / LX1
*/
/* Delta-Mu 1 image (2MiB) */
PREALLOC_NORMAL("ST231aImage", 0x24000000, 0x24200000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 monitor (8KiB) */
PREALLOC_NORMAL("ST231aMonitor", 0x24200000, 0x24202000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 RAM (~19.4 (21.5MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory1", 0x24202000, 0x25580000-1,
IORESOURCE_MEM)
/*
* Sysaudio Driver
*/
/* DSP code and data images (1MiB) */
PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC CPU PCM buffer (40KiB) */
PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC AUX buffer (128KiB) */
PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC Main buffer (128KiB) */
PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* STAVEM driver/STAPI
*/
/* 4.5MiB */
PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00480000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* GHW HAL Driver
*/
/* PowerTV Graphics Heap (14MiB) */
PREALLOC_NORMAL("GraphicsHeap", 0x25600000, 0x25600000+(14*1048576)-1,
IORESOURCE_MEM)
/*
* multi com buffer area
*/
/* 128KiB */
PREALLOC_NORMAL("MulticomSHM", 0x23700000, 0x23720000-1,
IORESOURCE_MEM)
/*
* DMA Ring buffer (don't need recording buffers)
*/
/* 680KiB */
PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Display bins buffer for unit0
*/
/* 4KiB */
PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Display bins buffer for unit1
*/
/* 4KiB */
PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* AVFS: player HAL memory
*/
/* 945K * 3 for playback */
PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* PMEM
*/
/* Persistent memory for diagnostics (64KiB) */
PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Smartcard
*/
/* Read and write buffers for Internal/External cards (10KiB) */
PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* NAND Flash
*/
/* 10KiB */
PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1,
IORESOURCE_MEM)
/*
* Synopsys GMAC Memory Region
*/
/* 64KiB */
PREALLOC_NORMAL("GMAC", 0x00000000, 0x00010000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Add other resources here
*/
/*
* End of Resource marker
*/
{
.flags = 0,
},
};

340
arch/mips/powertv/asic/prealloc-cronus.c Normal file
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/*
* Memory pre-allocations for Cronus boxes.
*
* Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* Author: Ken Eppinett
* David Schleef <ds@schleef.org>
*/
#include <linux/init.h>
#include <linux/ioport.h>
#include <asm/mach-powertv/asic.h>
#include "prealloc.h"
/*
* DVR_CAPABLE CRONUS RESOURCES
*/
struct resource dvr_cronus_resources[] __initdata =
{
/*
* VIDEO1 / LX1
*/
/* Delta-Mu 1 image (2MiB) */
PREALLOC_NORMAL("ST231aImage", 0x24000000, 0x24200000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 monitor (8KiB) */
PREALLOC_NORMAL("ST231aMonitor", 0x24200000, 0x24202000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory1", 0x24202000, 0x26000000-1,
IORESOURCE_MEM)
/*
* VIDEO2 / LX2
*/
/* Delta-Mu 2 image (2MiB) */
PREALLOC_NORMAL("ST231bImage", 0x60000000, 0x60200000-1,
IORESOURCE_MEM)
/* Delta-Mu 2 monitor (8KiB) */
PREALLOC_NORMAL("ST231bMonitor", 0x60200000, 0x60202000-1,
IORESOURCE_MEM)
/* Delta-Mu 2 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory2", 0x60202000, 0x62000000-1,
IORESOURCE_MEM)
/*
* Sysaudio Driver
*/
/* DSP code and data images (1MiB) */
PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC CPU PCM buffer (40KiB) */
PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC AUX buffer (128KiB) */
PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC Main buffer (128KiB) */
PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* STAVEM driver/STAPI
*
* This memory area is used for allocating buffers for Video decoding
* purposes. Allocation/De-allocation within this buffer is managed
* by the STAVMEM driver of the STAPI. They could be Decimated
* Picture Buffers, Intermediate Buffers, as deemed necessary for
* video decoding purposes, for any video decoders on Zeus.
*/
/* 12MiB */
PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00c00000-1,
IORESOURCE_MEM)
/*
* DOCSIS Subsystem
*/
/* 7MiB */
PREALLOC_DOCSIS("Docsis", 0x67500000, 0x67c00000-1, IORESOURCE_MEM)
/*
* GHW HAL Driver
*/
/* PowerTV Graphics Heap (14MiB) */
PREALLOC_NORMAL("GraphicsHeap", 0x62700000, 0x63500000-1,
IORESOURCE_MEM)
/*
* multi com buffer area
*/
/* 128KiB */
PREALLOC_NORMAL("MulticomSHM", 0x26000000, 0x26020000-1,
IORESOURCE_MEM)
/*
* DMA Ring buffer
*/
PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x002EA000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Display bins buffer for unit0
*/
/* 4KiB */
PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Display bins buffer for unit1
*/
/* 4KiB */
PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1,
IORESOURCE_MEM)
/*
* ITFS
*/
/* 815,104 bytes each for 2 ITFS partitions. */
PREALLOC_NORMAL("ITFS", 0x00000000, 0x0018E000-1, IORESOURCE_MEM)
/*
* AVFS
*/
/* (945K * 8) = (128K * 3) 5 playbacks / 3 server */
PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x007c2000-1,
IORESOURCE_MEM)
/* 4KiB */
PREALLOC_NORMAL("AvfsFileSys", 0x00000000, 0x00001000-1,
IORESOURCE_MEM)
/*
* PMEM
*/
/* Persistent memory for diagnostics (64KiB) */
PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Smartcard
*/
/* Read and write buffers for Internal/External cards (10KiB) */
PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1,
IORESOURCE_MEM)
/*
* KAVNET
*/
/* NP Reset Vector - must be of the form xxCxxxxx (4KiB) */
PREALLOC_NORMAL("NP_Reset_Vector", 0x27c00000, 0x27c01000-1,
IORESOURCE_MEM)
/* NP Image - must be video bank 1 (320KiB) */
PREALLOC_NORMAL("NP_Image", 0x27020000, 0x27070000-1, IORESOURCE_MEM)
/* NP IPC - must be video bank 2 (512KiB) */
PREALLOC_NORMAL("NP_IPC", 0x63500000, 0x63580000-1, IORESOURCE_MEM)
/*
* TFTPBuffer
*
* This buffer is used in some minimal configurations (e.g. two-way
* loader) for storing software images
*/
PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Add other resources here
*/
/*
* End of Resource marker
*/
{
.flags = 0,
},
};
/*
* NON_DVR_CAPABLE CRONUS RESOURCES
*/
struct resource non_dvr_cronus_resources[] __initdata =
{
/*
* VIDEO1 / LX1
*/
/* Delta-Mu 1 image (2MiB) */
PREALLOC_NORMAL("ST231aImage", 0x24000000, 0x24200000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 monitor (8KiB) */
PREALLOC_NORMAL("ST231aMonitor", 0x24200000, 0x24202000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory1", 0x24202000, 0x26000000-1,
IORESOURCE_MEM)
/*
* VIDEO2 / LX2
*/
/* Delta-Mu 2 image (2MiB) */
PREALLOC_NORMAL("ST231bImage", 0x60000000, 0x60200000-1,
IORESOURCE_MEM)
/* Delta-Mu 2 monitor (8KiB) */
PREALLOC_NORMAL("ST231bMonitor", 0x60200000, 0x60202000-1,
IORESOURCE_MEM)
/* Delta-Mu 2 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory2", 0x60202000, 0x62000000-1,
IORESOURCE_MEM)
/*
* Sysaudio Driver
*/
/* DSP code and data images (1MiB) */
PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC CPU PCM buffer (40KiB) */
PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC AUX buffer (128KiB) */
PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC Main buffer (128KiB) */
PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* STAVEM driver/STAPI
*
* This memory area is used for allocating buffers for Video decoding
* purposes. Allocation/De-allocation within this buffer is managed
* by the STAVMEM driver of the STAPI. They could be Decimated
* Picture Buffers, Intermediate Buffers, as deemed necessary for
* video decoding purposes, for any video decoders on Zeus.
*/
/* 12MiB */
PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00c00000-1,
IORESOURCE_MEM)
/*
* DOCSIS Subsystem
*/
/* 7MiB */
PREALLOC_DOCSIS("Docsis", 0x67500000, 0x67c00000-1, IORESOURCE_MEM)
/*
* GHW HAL Driver
*/
/* PowerTV Graphics Heap (14MiB) */
PREALLOC_NORMAL("GraphicsHeap", 0x62700000, 0x63500000-1,
IORESOURCE_MEM)
/*
* multi com buffer area
*/
/* 128KiB */
PREALLOC_NORMAL("MulticomSHM", 0x26000000, 0x26020000-1,
IORESOURCE_MEM)
/*
* DMA Ring buffer (don't need recording buffers)
*/
/* 680KiB */
PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Display bins buffer for unit0
*/
/* 4KiB */
PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Display bins buffer for unit1
*/
/* 4KiB */
PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1,
IORESOURCE_MEM)
/*
* AVFS: player HAL memory
*/
/* 945K * 3 for playback */
PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1, IORESOURCE_MEM)
/*
* PMEM
*/
/* Persistent memory for diagnostics (64KiB) */
PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Smartcard
*/
/* Read and write buffers for Internal/External cards (10KiB) */
PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, IORESOURCE_MEM)
/*
* KAVNET
*/
/* NP Reset Vector - must be of the form xxCxxxxx (4KiB) */
PREALLOC_NORMAL("NP_Reset_Vector", 0x27c00000, 0x27c01000-1,
IORESOURCE_MEM)
/* NP Image - must be video bank 1 (320KiB) */
PREALLOC_NORMAL("NP_Image", 0x27020000, 0x27070000-1, IORESOURCE_MEM)
/* NP IPC - must be video bank 2 (512KiB) */
PREALLOC_NORMAL("NP_IPC", 0x63500000, 0x63580000-1, IORESOURCE_MEM)
/*
* NAND Flash
*/
/* 10KiB */
PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1,
IORESOURCE_MEM)
/*
* Add other resources here
*/
/*
* End of Resource marker
*/
{
.flags = 0,
},
};

174
arch/mips/powertv/asic/prealloc-cronuslite.c Normal file
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/*
* Memory pre-allocations for Cronus Lite boxes.
*
* Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* Author: Ken Eppinett
* David Schleef <ds@schleef.org>
*/
#include <linux/init.h>
#include <linux/ioport.h>
#include <asm/mach-powertv/asic.h>
#include "prealloc.h"
/*
* NON_DVR_CAPABLE CRONUSLITE RESOURCES
*/
struct resource non_dvr_cronuslite_resources[] __initdata =
{
/*
* VIDEO2 / LX2
*/
/* Delta-Mu 1 image (2MiB) */
PREALLOC_NORMAL("ST231aImage", 0x60000000, 0x60200000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 monitor (8KiB) */
PREALLOC_NORMAL("ST231aMonitor", 0x60200000, 0x60202000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory1", 0x60202000, 0x62000000-1,
IORESOURCE_MEM)
/*
* Sysaudio Driver
*/
/* DSP code and data images (1MiB) */
PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC CPU PCM buffer (40KiB) */
PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC AUX buffer (128KiB) */
PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC Main buffer (128KiB) */
PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* STAVEM driver/STAPI
*
* This memory area is used for allocating buffers for Video decoding
* purposes. Allocation/De-allocation within this buffer is managed
* by the STAVMEM driver of the STAPI. They could be Decimated
* Picture Buffers, Intermediate Buffers, as deemed necessary for
* video decoding purposes, for any video decoders on Zeus.
*/
/* 6MiB */
PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00600000-1,
IORESOURCE_MEM)
/*
* DOCSIS Subsystem
*/
/* 7MiB */
PREALLOC_DOCSIS("Docsis", 0x67500000, 0x67c00000-1, IORESOURCE_MEM)
/*
* GHW HAL Driver
*/
/* PowerTV Graphics Heap (14MiB) */
PREALLOC_NORMAL("GraphicsHeap", 0x62700000, 0x63500000-1,
IORESOURCE_MEM)
/*
* multi com buffer area
*/
/* 128KiB */
PREALLOC_NORMAL("MulticomSHM", 0x26000000, 0x26020000-1,
IORESOURCE_MEM)
/*
* DMA Ring buffer (don't need recording buffers)
*/
/* 680KiB */
PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Display bins buffer for unit0
*/
/* 4KiB */
PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Display bins buffer for unit1
*/
/* 4KiB */
PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1,
IORESOURCE_MEM)
/*
* AVFS: player HAL memory
*/
/* 945K * 3 for playback */
PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* PMEM
*/
/* Persistent memory for diagnostics (64KiB) */
PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Smartcard
*/
/* Read and write buffers for Internal/External cards (10KiB) */
PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, IORESOURCE_MEM)
/*
* KAVNET
*/
/* NP Reset Vector - must be of the form xxCxxxxx (4KiB) */
PREALLOC_NORMAL("NP_Reset_Vector", 0x27c00000, 0x27c01000-1,
IORESOURCE_MEM)
/* NP Image - must be video bank 1 (320KiB) */
PREALLOC_NORMAL("NP_Image", 0x27020000, 0x27070000-1, IORESOURCE_MEM)
/* NP IPC - must be video bank 2 (512KiB) */
PREALLOC_NORMAL("NP_IPC", 0x63500000, 0x63580000-1, IORESOURCE_MEM)
/*
* NAND Flash
*/
/* 10KiB */
PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1,
IORESOURCE_MEM)
/*
* TFTPBuffer
*
* This buffer is used in some minimal configurations (e.g. two-way
* loader) for storing software images
*/
PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Add other resources here
*/
/*
* End of Resource marker
*/
{
.flags = 0,
},
};

589
arch/mips/powertv/asic/prealloc-gaia.c Normal file
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/*
* Memory pre-allocations for Gaia boxes.
*
* Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* Author: David VomLehn
*/
#include <linux/init.h>
#include <asm/mach-powertv/asic.h>
/*
* DVR_CAPABLE GAIA RESOURCES
*/
struct resource dvr_gaia_resources[] __initdata = {
/*
*
* VIDEO1 / LX1
*
*/
{
.name = "ST231aImage", /* Delta-Mu 1 image and ram */
.start = 0x24000000,
.end = 0x241FFFFF, /* 2MiB */
.flags = IORESOURCE_MEM,
},
{
.name = "ST231aMonitor", /* 8KiB block ST231a monitor */
.start = 0x24200000,
.end = 0x24201FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "MediaMemory1",
.start = 0x24202000,
.end = 0x25FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
.flags = IORESOURCE_MEM,
},
/*
*
* VIDEO2 / LX2
*
*/
{
.name = "ST231bImage", /* Delta-Mu 2 image and ram */
.start = 0x60000000,
.end = 0x601FFFFF, /* 2MiB */
.flags = IORESOURCE_IO,
},
{
.name = "ST231bMonitor", /* 8KiB block ST231b monitor */
.start = 0x60200000,
.end = 0x60201FFF,
.flags = IORESOURCE_IO,
},
{
.name = "MediaMemory2",
.start = 0x60202000,
.end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
.flags = IORESOURCE_IO,
},
/*
*
* Sysaudio Driver
*
* This driver requires:
*
* Arbitrary Based Buffers:
* DSP_Image_Buff - DSP code and data images (1MB)
* ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB)
* ADSC_AUX_Buff - ADSC AUX buffer (16KB)
* ADSC_Main_Buff - ADSC Main buffer (16KB)
*
*/
{
.name = "DSP_Image_Buff",
.start = 0x00000000,
.end = 0x000FFFFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_CPU_PCM_Buff",
.start = 0x00000000,
.end = 0x00009FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_AUX_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_Main_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
/*
*
* STAVEM driver/STAPI
*
* This driver requires:
*
* Arbitrary Based Buffers:
* This memory area is used for allocating buffers for Video decoding
* purposes. Allocation/De-allocation within this buffer is managed
* by the STAVMEM driver of the STAPI. They could be Decimated
* Picture Buffers, Intermediate Buffers, as deemed necessary for
* video decoding purposes, for any video decoders on Zeus.
*
*/
{
.name = "AVMEMPartition0",
.start = 0x63580000,
.end = 0x64180000 - 1, /* 12 MB total */
.flags = IORESOURCE_IO,
},
/*
*
* DOCSIS Subsystem
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "Docsis",
.start = 0x62000000,
.end = 0x62700000 - 1, /* 7 MB total */
.flags = IORESOURCE_IO,
},
/*
*
* GHW HAL Driver
*
* This driver requires:
*
* Arbitrary Based Buffers:
* GraphicsHeap - PowerTV Graphics Heap
*
*/
{
.name = "GraphicsHeap",
.start = 0x62700000,
.end = 0x63500000 - 1, /* 14 MB total */
.flags = IORESOURCE_IO,
},
/*
*
* multi com buffer area
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "MulticomSHM",
.start = 0x26000000,
.end = 0x26020000 - 1,
.flags = IORESOURCE_MEM,
},
/*
*
* DMA Ring buffer
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "BMM_Buffer",
.start = 0x00000000,
.end = 0x00280000 - 1,
.flags = IORESOURCE_MEM,
},
/*
*
* Display bins buffer for unit0
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Display Bins for unit0
*
*/
{
.name = "DisplayBins0",
.start = 0x00000000,
.end = 0x00000FFF, /* 4 KB total */
.flags = IORESOURCE_MEM,
},
/*
*
* Display bins buffer
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Display Bins for unit1
*
*/
{
.name = "DisplayBins1",
.start = 0x64AD4000,
.end = 0x64AD5000 - 1, /* 4 KB total */
.flags = IORESOURCE_IO,
},
/*
*
* ITFS
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "ITFS",
.start = 0x64180000,
/* 815,104 bytes each for 2 ITFS partitions. */
.end = 0x6430DFFF,
.flags = IORESOURCE_IO,
},
/*
*
* AVFS
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "AvfsDmaMem",
.start = 0x6430E000,
/* (945K * 8) = (128K *3) 5 playbacks / 3 server */
.end = 0x64AD0000 - 1,
.flags = IORESOURCE_IO,
},
{
.name = "AvfsFileSys",
.start = 0x64AD0000,
.end = 0x64AD1000 - 1, /* 4K */
.flags = IORESOURCE_IO,
},
/*
*
* Smartcard
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Read and write buffers for Internal/External cards
*
*/
{
.name = "SmartCardInfo",
.start = 0x64AD1000,
.end = 0x64AD3800 - 1,
.flags = IORESOURCE_IO,
},
/*
*
* KAVNET
* NP Reset Vector - must be of the form xxCxxxxx
* NP Image - must be video bank 1
* NP IPC - must be video bank 2
*/
{
.name = "NP_Reset_Vector",
.start = 0x27c00000,
.end = 0x27c01000 - 1,
.flags = IORESOURCE_MEM,
},
{
.name = "NP_Image",
.start = 0x27020000,
.end = 0x27060000 - 1,
.flags = IORESOURCE_MEM,
},
{
.name = "NP_IPC",
.start = 0x63500000,
.end = 0x63580000 - 1,
.flags = IORESOURCE_IO,
},
/*
* Add other resources here
*/
{ },
};
/*
* NON_DVR_CAPABLE GAIA RESOURCES
*/
struct resource non_dvr_gaia_resources[] __initdata = {
/*
*
* VIDEO1 / LX1
*
*/
{
.name = "ST231aImage", /* Delta-Mu 1 image and ram */
.start = 0x24000000,
.end = 0x241FFFFF, /* 2MiB */
.flags = IORESOURCE_MEM,
},
{
.name = "ST231aMonitor", /* 8KiB block ST231a monitor */
.start = 0x24200000,
.end = 0x24201FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "MediaMemory1",
.start = 0x24202000,
.end = 0x25FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
.flags = IORESOURCE_MEM,
},
/*
*
* VIDEO2 / LX2
*
*/
{
.name = "ST231bImage", /* Delta-Mu 2 image and ram */
.start = 0x60000000,
.end = 0x601FFFFF, /* 2MiB */
.flags = IORESOURCE_IO,
},
{
.name = "ST231bMonitor", /* 8KiB block ST231b monitor */
.start = 0x60200000,
.end = 0x60201FFF,
.flags = IORESOURCE_IO,
},
{
.name = "MediaMemory2",
.start = 0x60202000,
.end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
.flags = IORESOURCE_IO,
},
/*
*
* Sysaudio Driver
*
* This driver requires:
*
* Arbitrary Based Buffers:
* DSP_Image_Buff - DSP code and data images (1MB)
* ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB)
* ADSC_AUX_Buff - ADSC AUX buffer (16KB)
* ADSC_Main_Buff - ADSC Main buffer (16KB)
*
*/
{
.name = "DSP_Image_Buff",
.start = 0x00000000,
.end = 0x000FFFFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_CPU_PCM_Buff",
.start = 0x00000000,
.end = 0x00009FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_AUX_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_Main_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
/*
*
* STAVEM driver/STAPI
*
* This driver requires:
*
* Arbitrary Based Buffers:
* This memory area is used for allocating buffers for Video decoding
* purposes. Allocation/De-allocation within this buffer is managed
* by the STAVMEM driver of the STAPI. They could be Decimated
* Picture Buffers, Intermediate Buffers, as deemed necessary for
* video decoding purposes, for any video decoders on Zeus.
*
*/
{
.name = "AVMEMPartition0",
.start = 0x63580000,
.end = 0x64180000 - 1, /* 12 MB total */
.flags = IORESOURCE_IO,
},
/*
*
* DOCSIS Subsystem
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "Docsis",
.start = 0x62000000,
.end = 0x62700000 - 1, /* 7 MB total */
.flags = IORESOURCE_IO,
},
/*
*
* GHW HAL Driver
*
* This driver requires:
*
* Arbitrary Based Buffers:
* GraphicsHeap - PowerTV Graphics Heap
*
*/
{
.name = "GraphicsHeap",
.start = 0x62700000,
.end = 0x63500000 - 1, /* 14 MB total */
.flags = IORESOURCE_IO,
},
/*
*
* multi com buffer area
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "MulticomSHM",
.start = 0x26000000,
.end = 0x26020000 - 1,
.flags = IORESOURCE_MEM,
},
/*
*
* DMA Ring buffer
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "BMM_Buffer",
.start = 0x00000000,
.end = 0x000AA000 - 1,
.flags = IORESOURCE_MEM,
},
/*
*
* Display bins buffer for unit0
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Display Bins for unit0
*
*/
{
.name = "DisplayBins0",
.start = 0x00000000,
.end = 0x00000FFF, /* 4 KB total */
.flags = IORESOURCE_MEM,
},
/*
*
* Display bins buffer
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Display Bins for unit1
*
*/
{
.name = "DisplayBins1",
.start = 0x64AD4000,
.end = 0x64AD5000 - 1, /* 4 KB total */
.flags = IORESOURCE_IO,
},
/*
*
* AVFS: player HAL memory
*
*
*/
{
.name = "AvfsDmaMem",
.start = 0x6430E000,
.end = 0x645D2C00 - 1, /* 945K * 3 for playback */
.flags = IORESOURCE_IO,
},
/*
*
* PMEM
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Persistent memory for diagnostics.
*
*/
{
.name = "DiagPersistentMemory",
.start = 0x00000000,
.end = 0x10000 - 1,
.flags = IORESOURCE_MEM,
},
/*
*
* Smartcard
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Read and write buffers for Internal/External cards
*
*/
{
.name = "SmartCardInfo",
.start = 0x64AD1000,
.end = 0x64AD3800 - 1,
.flags = IORESOURCE_IO,
},
/*
*
* KAVNET
* NP Reset Vector - must be of the form xxCxxxxx
* NP Image - must be video bank 1
* NP IPC - must be video bank 2
*/
{
.name = "NP_Reset_Vector",
.start = 0x27c00000,
.end = 0x27c01000 - 1,
.flags = IORESOURCE_MEM,
},
{
.name = "NP_Image",
.start = 0x27020000,
.end = 0x27060000 - 1,
.flags = IORESOURCE_MEM,
},
{
.name = "NP_IPC",
.start = 0x63500000,
.end = 0x63580000 - 1,
.flags = IORESOURCE_IO,
},
{ },
};

304
arch/mips/powertv/asic/prealloc-zeus.c Normal file
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/*
* Memory pre-allocations for Zeus boxes.
*
* Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* Author: Ken Eppinett
* David Schleef <ds@schleef.org>
*/
#include <linux/init.h>
#include <linux/ioport.h>
#include <asm/mach-powertv/asic.h>
#include "prealloc.h"
/*
* DVR_CAPABLE RESOURCES
*/
struct resource dvr_zeus_resources[] __initdata =
{
/*
* VIDEO1 / LX1
*/
/* Delta-Mu 1 image (2MiB) */
PREALLOC_NORMAL("ST231aImage", 0x20000000, 0x20200000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 monitor (8KiB) */
PREALLOC_NORMAL("ST231aMonitor", 0x20200000, 0x20202000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory1", 0x20202000, 0x22000000-1,
IORESOURCE_MEM)
/*
* VIDEO2 / LX2
*/
/* Delta-Mu 2 image (2MiB) */
PREALLOC_NORMAL("ST231bImage", 0x30000000, 0x30200000-1,
IORESOURCE_MEM)
/* Delta-Mu 2 monitor (8KiB) */
PREALLOC_NORMAL("ST231bMonitor", 0x30200000, 0x30202000-1,
IORESOURCE_MEM)
/* Delta-Mu 2 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory2", 0x30202000, 0x32000000-1,
IORESOURCE_MEM)
/*
* Sysaudio Driver
*/
/* DSP code and data images (1MiB) */
PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC CPU PCM buffer (40KiB) */
PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC AUX buffer (16KiB) */
PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00004000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC Main buffer (16KiB) */
PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00004000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* STAVEM driver/STAPI
*
* This memory area is used for allocating buffers for Video decoding
* purposes. Allocation/De-allocation within this buffer is managed
* by the STAVMEM driver of the STAPI. They could be Decimated
* Picture Buffers, Intermediate Buffers, as deemed necessary for
* video decoding purposes, for any video decoders on Zeus.
*/
/* 12MiB */
PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00c00000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* DOCSIS Subsystem
*/
/* 7MiB */
PREALLOC_DOCSIS("Docsis", 0x40100000, 0x40800000-1, IORESOURCE_MEM)
/*
* GHW HAL Driver
*/
/* PowerTV Graphics Heap (14MiB) */
PREALLOC_NORMAL("GraphicsHeap", 0x46900000, 0x47700000-1,
IORESOURCE_MEM)
/*
* multi com buffer area
*/
/* 128KiB */
PREALLOC_NORMAL("MulticomSHM", 0x47900000, 0x47920000-1,
IORESOURCE_MEM)
/*
* DMA Ring buffer
*/
/* 2.5MiB */
PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x00280000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Display bins buffer for unit0
*/
/* 4KiB */
PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Display bins buffer for unit1
*/
/* 4KiB */
PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* ITFS
*/
/* 815,104 bytes each for 2 ITFS partitions. */
PREALLOC_NORMAL("ITFS", 0x00000000, 0x0018E000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* AVFS
*/
/* (945K * 8) = (128K * 3) 5 playbacks / 3 server */
PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x007c2000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* 4KiB */
PREALLOC_NORMAL("AvfsFileSys", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* PMEM
*/
/* Persistent memory for diagnostics (64KiB) */
PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Smartcard
*/
/* Read and write buffers for Internal/External cards (10KiB) */
PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* TFTPBuffer
*
* This buffer is used in some minimal configurations (e.g. two-way
* loader) for storing software images
*/
PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Add other resources here
*/
/*
* End of Resource marker
*/
{
.flags = 0,
},
};
/*
* NON_DVR_CAPABLE ZEUS RESOURCES
*/
struct resource non_dvr_zeus_resources[] __initdata =
{
/*
* VIDEO1 / LX1
*/
/* Delta-Mu 1 image (2MiB) */
PREALLOC_NORMAL("ST231aImage", 0x20000000, 0x20200000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 monitor (8KiB) */
PREALLOC_NORMAL("ST231aMonitor", 0x20200000, 0x20202000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory1", 0x20202000, 0x22000000-1,
IORESOURCE_MEM)
/*
* Sysaudio Driver
*/
/* DSP code and data images (1MiB) */
PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC CPU PCM buffer (40KiB) */
PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC AUX buffer (16KiB) */
PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00004000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC Main buffer (16KiB) */
PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00004000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* STAVEM driver/STAPI
*/
/* 6MiB */
PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00600000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* DOCSIS Subsystem
*/
/* 7MiB */
PREALLOC_DOCSIS("Docsis", 0x40100000, 0x40800000-1, IORESOURCE_MEM)
/*
* GHW HAL Driver
*/
/* PowerTV Graphics Heap (14MiB) */
PREALLOC_NORMAL("GraphicsHeap", 0x46900000, 0x47700000-1,
IORESOURCE_MEM)
/*
* multi com buffer area
*/
/* 128KiB */
PREALLOC_NORMAL("MulticomSHM", 0x47900000, 0x47920000-1,
IORESOURCE_MEM)
/*
* DMA Ring buffer
*/
/* 2.5MiB */
PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x00280000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Display bins buffer for unit0
*/
/* 4KiB */
PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* AVFS: player HAL memory
*/
/* 945K * 3 for playback */
PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* PMEM
*/
/* Persistent memory for diagnostics (64KiB) */
PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Smartcard
*/
/* Read and write buffers for Internal/External cards (10KiB) */
PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* NAND Flash
*/
/* 10KiB */
PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1,
IORESOURCE_MEM)
/*
* TFTPBuffer
*
* This buffer is used in some minimal configurations (e.g. two-way
* loader) for storing software images
*/
PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Add other resources here
*/
/*
* End of Resource marker
*/
{
.flags = 0,
},
};

70
arch/mips/powertv/asic/prealloc.h Normal file
View File

@@ -0,0 +1,70 @@
/*
* Definitions for memory preallocations
*
* Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _ARCH_MIPS_POWERTV_ASIC_PREALLOC_H
#define _ARCH_MIPS_POWERTV_ASIC_PREALLOC_H
#define KIBIBYTE(n) ((n) * 1024) /* Number of kibibytes */
#define MEBIBYTE(n) ((n) * KIBIBYTE(1024)) /* Number of mebibytes */
/* "struct resource" array element definition */
#define PREALLOC(NAME, START, END, FLAGS) { \
.name = (NAME), \
.start = (START), \
.end = (END), \
.flags = (FLAGS) \
},
/* Individual resources in the preallocated resource arrays are defined using
* macros. These macros are conditionally defined based on their
* corresponding kernel configuration flag:
* - CONFIG_PREALLOC_NORMAL: preallocate resources for a normal settop box
* - CONFIG_PREALLOC_TFTP: preallocate the TFTP download resource
* - CONFIG_PREALLOC_DOCSIS: preallocate the DOCSIS resource
* - CONFIG_PREALLOC_PMEM: reserve space for persistent memory
*/
#ifdef CONFIG_PREALLOC_NORMAL
#define PREALLOC_NORMAL(name, start, end, flags) \
PREALLOC(name, start, end, flags)
#else
#define PREALLOC_NORMAL(name, start, end, flags)
#endif
#ifdef CONFIG_PREALLOC_TFTP
#define PREALLOC_TFTP(name, start, end, flags) \
PREALLOC(name, start, end, flags)
#else
#define PREALLOC_TFTP(name, start, end, flags)
#endif
#ifdef CONFIG_PREALLOC_DOCSIS
#define PREALLOC_DOCSIS(name, start, end, flags) \
PREALLOC(name, start, end, flags)
#else
#define PREALLOC_DOCSIS(name, start, end, flags)
#endif
#ifdef CONFIG_PREALLOC_PMEM
#define PREALLOC_PMEM(name, start, end, flags) \
PREALLOC(name, start, end, flags)
#else
#define PREALLOC_PMEM(name, start, end, flags)
#endif
#endif